mirror of https://github.com/m-labs/artiq.git
56 lines
1.1 KiB
Rust
56 lines
1.1 KiB
Rust
#![feature(asm, lang_items)]
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#![no_std]
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#[macro_use]
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extern crate log;
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#[macro_use]
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extern crate bitflags;
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use core::{cmp, ptr, str};
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include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs"));
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include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs"));
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pub mod spr;
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pub mod irq;
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pub mod cache;
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pub mod pcr;
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pub mod clock;
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pub mod uart;
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#[cfg(feature = "uart_console")]
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pub mod uart_console;
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#[cfg(has_spiflash)]
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pub mod spiflash;
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pub mod i2c;
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pub mod spi;
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#[cfg(has_si5324)]
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pub mod si5324;
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#[cfg(has_serwb_phy_amc)]
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pub mod serwb;
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#[cfg(has_hmc830_7043)]
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pub mod hmc830_7043;
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#[cfg(has_ad9154)]
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#[allow(dead_code)]
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mod ad9154_reg;
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#[cfg(has_ad9154)]
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pub mod ad9154;
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pub mod boot;
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#[cfg(feature = "uart_console")]
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pub use uart_console::Console;
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pub fn ident(buf: &mut [u8]) -> &str {
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unsafe {
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let len = ptr::read_volatile(csr::IDENTIFIER_MEM_BASE);
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let len = cmp::min(len as usize, buf.len());
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for i in 0..len {
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buf[i] = ptr::read_volatile(csr::IDENTIFIER_MEM_BASE.offset(1 + i as isize)) as u8
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}
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str::from_utf8_unchecked(&buf[..len])
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}
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}
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