mirror of https://github.com/m-labs/artiq
55 lines
1.5 KiB
Python
55 lines
1.5 KiB
Python
from artiq.language.core import kernel, delay
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from artiq.language.units import us
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class ShiftReg:
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"""Driver for shift registers/latch combos connected to TTLs"""
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kernel_invariants = {"dt", "n"}
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def __init__(self, dmgr, clk, ser, latch, n=32, dt=10*us, ser_in=None):
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self.core = dmgr.get("core")
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self.clk = dmgr.get(clk)
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self.ser = dmgr.get(ser)
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self.latch = dmgr.get(latch)
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self.n = n
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self.dt = dt
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if ser_in is not None:
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self.ser_in = dmgr.get(ser_in)
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@kernel
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def set(self, data):
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"""Sets the values of the latch outputs. This does not
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advance the timeline and the waveform is generated before
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`now`."""
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delay(-2*(self.n + 1)*self.dt)
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for i in range(self.n):
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if (data >> (self.n-i-1)) & 1 == 0:
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self.ser.off()
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else:
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self.ser.on()
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self.clk.off()
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delay(self.dt)
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self.clk.on()
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delay(self.dt)
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self.clk.off()
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self.latch.on()
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delay(self.dt)
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self.latch.off()
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delay(self.dt)
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@kernel
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def get(self):
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delay(-2*(self.n + 1)*self.dt)
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data = 0
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for i in range(self.n):
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data <<= 1
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self.ser_in.sample_input()
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if self.ser_in.sample_get():
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data |= 1
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delay(self.dt)
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self.clk.on()
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delay(self.dt)
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self.clk.off()
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delay(self.dt)
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return data
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