mirror of https://github.com/m-labs/artiq.git
107 lines
2.8 KiB
Python
107 lines
2.8 KiB
Python
from artiq.language.core import kernel, syscall
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from artiq.language.types import TInt32, TNone
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_init() -> TNone:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_write(addr: TInt32, data: TInt32) -> TNone:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_read(addr: TInt32) -> TInt32:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9516_write(addr: TInt32, data: TInt32) -> TNone:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9516_read(addr: TInt32) -> TInt32:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_jesd_enable(en: TInt32) -> TNone:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_jesd_ready() -> TInt32:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_jesd_prbs(prbs: TInt32) -> TNone:
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raise NotImplementedError("syscall not simulated")
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@syscall(flags={"nounwind", "nowrite"})
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def ad9154_jesd_stpl(prbs: TInt32) -> TNone:
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raise NotImplementedError("syscall not simulated")
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class AD9154:
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"""AD9154-FMC-EBZ SPI support
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There are two devices on the SPI bus, a AD9154 DAC and a AD9516 clock
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divider/fanout.
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Register and bit names are in :mod:`artiq.coredevice.ad9154_reg` and
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:mod:`artiq.coredevice.ad9516_reg` respectively.
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The SPI bus does not operate over RTIO but directly. This class does not
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interact with the timeline.
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"""
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def __init__(self, dmgr, core_device="core"):
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self.core = dmgr.get(core_device)
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@kernel
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def init(self):
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"""Initialize and configure the SPI bus."""
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ad9154_init()
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@kernel
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def dac_write(self, addr, data):
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"""Write `data` to AD9154 SPI register at `addr`."""
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ad9154_write(addr, data)
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@kernel
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def dac_read(self, addr):
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"""Read AD9154 SPI register at `addr`."""
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return ad9154_read(addr)
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@kernel
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def clock_write(self, addr, data):
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"""Write `data` to AD9516 SPI register at `addr`."""
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ad9516_write(addr, data)
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@kernel
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def clock_read(self, addr):
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"""Read AD9516 SPI register at `addr`."""
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return ad9516_read(addr)
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@kernel
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def jesd_enable(self, en):
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"""Enables the JESD204B core startup sequence."""
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ad9154_jesd_enable(en)
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@kernel
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def jesd_ready(self):
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"""Returns `True` if the JESD links are up."""
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return ad9154_jesd_ready()
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@kernel
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def jesd_prbs(self, prbs):
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ad9154_jesd_prbs(prbs)
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@kernel
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def jesd_stpl(self, enable):
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ad9154_jesd_stpl(enable)
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