mirror of https://github.com/m-labs/artiq
559 lines
18 KiB
Rust
559 lines
18 KiB
Rust
#![no_std]
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#![feature(panic_info_message)]
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extern crate crc;
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extern crate byteorder;
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extern crate smoltcp;
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#[macro_use]
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extern crate board_misoc;
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extern crate riscv;
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use core::{ptr, slice, convert::TryFrom};
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use crc::crc32;
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use byteorder::{ByteOrder, LittleEndian};
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use board_misoc::{ident, cache, sdram, config, boot, mem as board_mem};
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#[cfg(has_slave_fpga_cfg)]
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use board_misoc::slave_fpga;
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#[cfg(has_ethmac)]
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use board_misoc::{clock, ethmac, net_settings};
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use board_misoc::uart_console::Console;
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use riscv::register::{mcause, mepc, mtval};
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use smoltcp::iface::SocketStorage;
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use smoltcp::wire::{HardwareAddress, IpAddress, Ipv4Address};
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fn check_integrity() -> bool {
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extern {
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static _begin: u8;
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static _end: u8;
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static _crc: u32;
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}
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unsafe {
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let length = &_end as *const u8 as usize -
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&_begin as *const u8 as usize;
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let bootloader = slice::from_raw_parts(&_begin as *const u8, length);
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crc32::checksum_ieee(bootloader) == _crc
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}
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}
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fn memory_test(total: &mut usize, wrong: &mut usize) -> bool {
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const MEMORY: *mut u32 = board_mem::MAIN_RAM_BASE as *mut u32;
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*total = 0;
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*wrong = 0;
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macro_rules! test {
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(
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$prepare:stmt;
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for $i:ident in ($range:expr) {
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MEMORY[$index:expr] = $data:expr
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}
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) => ({
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$prepare
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for $i in $range {
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unsafe { ptr::write_volatile(MEMORY.offset($index as isize), $data) };
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*total += 1;
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}
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cache::flush_cpu_dcache();
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cache::flush_l2_cache();
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$prepare
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for $i in $range {
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if unsafe { ptr::read_volatile(MEMORY.offset($index as isize)) } != $data {
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*wrong += 1;
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}
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}
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})
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}
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fn prng32(seed: &mut u32) -> u32 { *seed = u32::wrapping_add(u32::wrapping_mul(1664525, *seed), 1013904223); *seed }
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fn prng16(seed: &mut u16) -> u16 { *seed = u16::wrapping_add(u16::wrapping_mul(25173, *seed), 13849); *seed }
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for _ in 0..4 {
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// Test data bus
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test!((); for i in (0..0x100) { MEMORY[i] = 0xAAAAAAAA });
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test!((); for i in (0..0x100) { MEMORY[i] = 0x55555555 });
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// Test counter addressing with random data
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test!(let mut seed = 0;
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for i in (0..0x100000) { MEMORY[i] = prng32(&mut seed) });
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// Test random addressing with counter data
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test!(let mut seed = 0;
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for i in (0..0x10000) { MEMORY[prng16(&mut seed)] = i });
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}
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*wrong == 0
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}
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fn startup() -> bool {
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if check_integrity() {
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println!("Bootloader CRC passed");
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} else {
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println!("Bootloader CRC failed");
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return false
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}
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println!("Gateware ident {}", ident::read(&mut [0; 64]));
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println!("Initializing SDRAM...");
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if unsafe { sdram::init(Some(&mut Console)) } {
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println!("SDRAM initialized");
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} else {
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println!("SDRAM initialization failed");
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return false
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}
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let (mut total, mut wrong) = (0, 0);
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if memory_test(&mut total, &mut wrong) {
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println!("Memory test passed");
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} else {
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println!("Memory test failed ({}/{} words incorrect)", wrong, total);
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return false
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}
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true
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}
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#[cfg(has_slave_fpga_cfg)]
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fn load_slave_fpga() {
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println!("Loading slave FPGA gateware...");
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const GATEWARE: *mut u8 = board_misoc::csr::CONFIG_SLAVE_FPGA_GATEWARE as *mut u8;
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let header = unsafe { slice::from_raw_parts(GATEWARE, 8) };
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let magic = LittleEndian::read_u32(&header[0..]);
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let length = LittleEndian::read_u32(&header[4..]) as usize;
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println!(" magic: 0x{:08x}, length: 0x{:08x}", magic, length);
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if magic != 0x5352544d {
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println!(" ...Error: bad magic");
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return
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}
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if length > 0x220000 {
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println!(" ...Error: too long (corrupted?)");
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return
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}
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let payload = unsafe { slice::from_raw_parts(GATEWARE.offset(8), length) };
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if let Err(e) = slave_fpga::prepare() {
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println!(" ...Error during preparation: {}", e);
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return
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}
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if let Err(e) = slave_fpga::input(payload) {
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println!(" ...Error during loading: {}", e);
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return
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}
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if let Err(e) = slave_fpga::startup() {
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println!(" ...Error during startup: {}", e);
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return
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}
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println!(" ...done");
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}
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fn flash_boot() {
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const FIRMWARE: *mut u8 = board_mem::FLASH_BOOT_ADDRESS as *mut u8;
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const MAIN_RAM: *mut u8 = board_mem::MAIN_RAM_BASE as *mut u8;
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println!("Booting from flash...");
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let header = unsafe { slice::from_raw_parts(FIRMWARE, 8) };
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let length = LittleEndian::read_u32(&header[0..]) as usize;
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let expected_crc = LittleEndian::read_u32(&header[4..]);
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if length == 0 || length == 0xffffffff {
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println!("No firmware present");
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return
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} else if length > 4 * 1024 * 1024 {
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println!("Firmware too large (is it corrupted?)");
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return
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}
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let firmware_in_flash = unsafe { slice::from_raw_parts(FIRMWARE.offset(8), length) };
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let actual_crc_flash = crc32::checksum_ieee(firmware_in_flash);
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if actual_crc_flash == expected_crc {
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let firmware_in_sdram = unsafe { slice::from_raw_parts_mut(MAIN_RAM, length) };
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firmware_in_sdram.copy_from_slice(firmware_in_flash);
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let actual_crc_sdram = crc32::checksum_ieee(firmware_in_sdram);
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if actual_crc_sdram == expected_crc {
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println!("Starting firmware.");
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unsafe { boot::jump(MAIN_RAM as usize) }
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} else {
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println!("Firmware CRC failed in SDRAM (actual {:08x}, expected {:08x})",
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actual_crc_sdram, expected_crc);
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}
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} else {
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println!("Firmware CRC failed in flash (actual {:08x}, expected {:08x})",
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actual_crc_flash, expected_crc);
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}
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}
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#[cfg(has_ethmac)]
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enum NetConnState {
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WaitCommand,
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FirmwareLength(usize, u8),
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FirmwareDownload(usize, usize),
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FirmwareWaitO,
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FirmwareWaitK,
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#[cfg(has_slave_fpga_cfg)]
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GatewareLength(usize, u8),
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#[cfg(has_slave_fpga_cfg)]
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GatewareDownload(usize, usize),
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#[cfg(has_slave_fpga_cfg)]
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GatewareWaitO,
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#[cfg(has_slave_fpga_cfg)]
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GatewareWaitK
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}
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#[cfg(has_ethmac)]
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struct NetConn {
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state: NetConnState,
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firmware_downloaded: bool
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}
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#[cfg(has_ethmac)]
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impl NetConn {
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pub fn new() -> NetConn {
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NetConn {
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state: NetConnState::WaitCommand,
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firmware_downloaded: false
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}
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}
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pub fn reset(&mut self) {
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self.state = NetConnState::WaitCommand;
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self.firmware_downloaded = false;
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}
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// buf must contain at least one byte
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// this function must consume at least one byte
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fn input_partial(&mut self, buf: &[u8], mut boot_callback: impl FnMut()) -> Result<usize, ()> {
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match self.state {
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NetConnState::WaitCommand => {
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match buf[0] {
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b'F' => {
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println!("Received firmware load command");
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self.state = NetConnState::FirmwareLength(0, 0);
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Ok(1)
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},
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#[cfg(has_slave_fpga_cfg)]
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b'G' => {
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println!("Received gateware load command");
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self.state = NetConnState::GatewareLength(0, 0);
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Ok(1)
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}
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b'B' => {
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if self.firmware_downloaded {
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println!("Received boot command");
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boot_callback();
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self.state = NetConnState::WaitCommand;
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Ok(1)
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} else {
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println!("Received boot command, but no firmware downloaded");
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Err(())
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}
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},
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_ => {
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println!("Received unknown netboot command: 0x{:02x}", buf[0]);
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Err(())
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}
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}
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},
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NetConnState::FirmwareLength(firmware_length, recv_bytes) => {
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let firmware_length = (firmware_length << 8) | (buf[0] as usize);
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let recv_bytes = recv_bytes + 1;
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if recv_bytes == 4 {
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self.state = NetConnState::FirmwareDownload(firmware_length, 0);
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} else {
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self.state = NetConnState::FirmwareLength(firmware_length, recv_bytes);
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}
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Ok(1)
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},
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NetConnState::FirmwareDownload(firmware_length, recv_bytes) => {
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let max_length = firmware_length - recv_bytes;
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let buf = if buf.len() > max_length {
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&buf[..max_length]
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} else {
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&buf[..]
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};
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let length = buf.len();
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let firmware_in_sdram = unsafe { slice::from_raw_parts_mut((board_mem::MAIN_RAM_BASE + recv_bytes) as *mut u8, length) };
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firmware_in_sdram.copy_from_slice(buf);
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let recv_bytes = recv_bytes + length;
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if recv_bytes == firmware_length {
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self.state = NetConnState::FirmwareWaitO;
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Ok(length)
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} else {
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self.state = NetConnState::FirmwareDownload(firmware_length, recv_bytes);
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Ok(length)
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}
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},
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NetConnState::FirmwareWaitO => {
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if buf[0] == b'O' {
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self.state = NetConnState::FirmwareWaitK;
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Ok(1)
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} else {
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println!("End-of-firmware confirmation failed");
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Err(())
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}
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},
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NetConnState::FirmwareWaitK => {
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if buf[0] == b'K' {
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println!("Firmware successfully downloaded");
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self.state = NetConnState::WaitCommand;
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self.firmware_downloaded = true;
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Ok(1)
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} else {
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println!("End-of-firmware confirmation failed");
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Err(())
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}
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}
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#[cfg(has_slave_fpga_cfg)]
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NetConnState::GatewareLength(gateware_length, recv_bytes) => {
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let gateware_length = (gateware_length << 8) | (buf[0] as usize);
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let recv_bytes = recv_bytes + 1;
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if recv_bytes == 4 {
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if let Err(e) = slave_fpga::prepare() {
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println!(" Error during slave FPGA preparation: {}", e);
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return Err(())
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}
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self.state = NetConnState::GatewareDownload(gateware_length, 0);
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} else {
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self.state = NetConnState::GatewareLength(gateware_length, recv_bytes);
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}
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Ok(1)
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},
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#[cfg(has_slave_fpga_cfg)]
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NetConnState::GatewareDownload(gateware_length, recv_bytes) => {
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let max_length = gateware_length - recv_bytes;
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let buf = if buf.len() > max_length {
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&buf[..max_length]
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} else {
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&buf[..]
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};
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let length = buf.len();
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if let Err(e) = slave_fpga::input(buf) {
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println!("Error during slave FPGA loading: {}", e);
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return Err(())
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}
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let recv_bytes = recv_bytes + length;
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if recv_bytes == gateware_length {
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self.state = NetConnState::GatewareWaitO;
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Ok(length)
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} else {
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self.state = NetConnState::GatewareDownload(gateware_length, recv_bytes);
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Ok(length)
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}
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},
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#[cfg(has_slave_fpga_cfg)]
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NetConnState::GatewareWaitO => {
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if buf[0] == b'O' {
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self.state = NetConnState::GatewareWaitK;
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Ok(1)
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} else {
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println!("End-of-gateware confirmation failed");
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Err(())
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}
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},
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#[cfg(has_slave_fpga_cfg)]
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NetConnState::GatewareWaitK => {
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if buf[0] == b'K' {
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if let Err(e) = slave_fpga::startup() {
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println!("Error during slave FPGA startup: {}", e);
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return Err(())
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}
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println!("Gateware successfully downloaded");
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self.state = NetConnState::WaitCommand;
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Ok(1)
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} else {
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println!("End-of-gateware confirmation failed");
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Err(())
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}
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}
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}
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}
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fn input(&mut self, buf: &[u8], mut boot_callback: impl FnMut()) -> Result<(), ()> {
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let mut remaining = &buf[..];
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while !remaining.is_empty() {
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let read_cnt = self.input_partial(remaining, &mut boot_callback)?;
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remaining = &remaining[read_cnt..];
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}
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Ok(())
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}
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}
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#[cfg(has_ethmac)]
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fn network_boot() {
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use smoltcp::wire::IpCidr;
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println!("Initializing network...");
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// Assuming only one socket is ever needed by the bootloader.
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// The smoltcp reuses the listening socket when the connection is established.
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let mut sockets = [SocketStorage::EMPTY];
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let mut net_device = unsafe { ethmac::EthernetDevice::new() };
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net_device.reset_phy_if_any();
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let mut neighbor_map = [None; 2];
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let neighbor_cache =
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smoltcp::iface::NeighborCache::new(&mut neighbor_map[..]);
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let net_addresses = net_settings::get_adresses();
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println!("Network addresses: {}", net_addresses);
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let mut ip_addrs = [
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IpCidr::new(IpAddress::Ipv4(Ipv4Address::UNSPECIFIED), 0),
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IpCidr::new(net_addresses.ipv6_ll_addr, 0),
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IpCidr::new(net_addresses.ipv6_ll_addr, 0)
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];
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if let net_settings::Ipv4AddrConfig::Static(ipv4) = net_addresses.ipv4_addr {
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ip_addrs[0] = IpCidr::new(IpAddress::Ipv4(ipv4), 0);
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}
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let mut interface = match net_addresses.ipv6_addr {
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Some(addr) => {
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ip_addrs[2] = IpCidr::new(addr, 0);
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smoltcp::iface::InterfaceBuilder::new(net_device, &mut sockets[..])
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.hardware_addr(HardwareAddress::Ethernet(net_addresses.hardware_addr))
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.ip_addrs(&mut ip_addrs[..])
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.neighbor_cache(neighbor_cache)
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.finalize()
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}
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None =>
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smoltcp::iface::InterfaceBuilder::new(net_device, &mut sockets[..])
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.hardware_addr(HardwareAddress::Ethernet(net_addresses.hardware_addr))
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.ip_addrs(&mut ip_addrs[..2])
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.neighbor_cache(neighbor_cache)
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.finalize()
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};
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let mut rx_storage = [0; 4096];
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let mut tx_storage = [0; 128];
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let tcp_rx_buffer = smoltcp::socket::TcpSocketBuffer::new(&mut rx_storage[..]);
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let tcp_tx_buffer = smoltcp::socket::TcpSocketBuffer::new(&mut tx_storage[..]);
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let tcp_socket = smoltcp::socket::TcpSocket::new(tcp_rx_buffer, tcp_tx_buffer);
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let tcp_handle = interface.add_socket(tcp_socket);
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let mut net_conn = NetConn::new();
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let mut boot_time = None;
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println!("Waiting for connections...");
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loop {
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let timestamp = clock::get_ms() as i64;
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{
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let socket = &mut *interface.get_socket::<smoltcp::socket::TcpSocket>(tcp_handle);
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match boot_time {
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None => {
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if !socket.is_open() {
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socket.listen(4269).unwrap() // 0x10ad
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}
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if socket.may_recv() {
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if socket.recv(|data| {
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(data.len(), net_conn.input(data, || { boot_time = Some(timestamp + 20); }).is_err())
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}).unwrap() {
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net_conn.reset();
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socket.close();
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}
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} else if socket.may_send() {
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net_conn.reset();
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socket.close();
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}
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},
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Some(boot_time) => {
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if timestamp > boot_time {
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println!("Starting firmware.");
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unsafe { boot::jump(board_mem::MAIN_RAM_BASE) }
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}
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}
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}
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}
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match interface.poll(smoltcp::time::Instant::from_millis(timestamp)) {
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Ok(_) => (),
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Err(smoltcp::Error::Unrecognized) => (),
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Err(err) => println!("Network error: {}", err)
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}
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}
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}
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#[no_mangle]
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pub extern fn main() -> i32 {
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println!("");
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println!(r" __ __ _ ____ ____ ");
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println!(r"| \/ (_) ___| ___ / ___|");
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println!(r"| |\/| | \___ \ / _ \| | ");
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println!(r"| | | | |___) | (_) | |___ ");
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println!(r"|_| |_|_|____/ \___/ \____|");
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println!("");
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println!("MiSoC Bootloader");
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println!("Copyright (c) 2017-2023 M-Labs Limited");
|
|
println!("");
|
|
|
|
#[cfg(has_ethmac)]
|
|
clock::init();
|
|
|
|
if startup() {
|
|
println!("");
|
|
if !config::read_str("no_flash_boot", |r| r == Ok("1")) {
|
|
#[cfg(has_slave_fpga_cfg)]
|
|
load_slave_fpga();
|
|
flash_boot();
|
|
} else {
|
|
println!("Flash booting has been disabled.");
|
|
}
|
|
#[cfg(has_ethmac)]
|
|
network_boot();
|
|
} else {
|
|
println!("Halting.");
|
|
}
|
|
|
|
println!("No boot medium.");
|
|
loop {}
|
|
}
|
|
|
|
#[no_mangle]
|
|
pub extern fn exception(_regs: *const u32) {
|
|
let pc = mepc::read();
|
|
let cause = mcause::read().cause();
|
|
let mtval = mtval::read();
|
|
panic!("{:?} at PC {:#08x}, trap value {:#08x}", cause, u32::try_from(pc).unwrap(), mtval);
|
|
}
|
|
|
|
#[no_mangle]
|
|
pub extern fn abort() {
|
|
println!("aborted");
|
|
loop {}
|
|
}
|
|
|
|
#[no_mangle] // https://github.com/rust-lang/rust/issues/{38281,51647}
|
|
#[panic_handler]
|
|
pub fn panic_fmt(info: &core::panic::PanicInfo) -> ! {
|
|
#[cfg(has_error_led)]
|
|
unsafe {
|
|
board_misoc::csr::error_led::out_write(1);
|
|
}
|
|
|
|
if let Some(location) = info.location() {
|
|
print!("panic at {}:{}:{}", location.file(), location.line(), location.column());
|
|
} else {
|
|
print!("panic at unknown location");
|
|
}
|
|
if let Some(message) = info.message() {
|
|
println!(": {}", message);
|
|
} else {
|
|
println!("");
|
|
}
|
|
loop {}
|
|
}
|