Sebastien Bourdeauducq 5bb6a3d8a6 style		2015-02-18 11:34:00 -07:00
..
Makefile	doc: add sphinx infrastructure	2014-09-18 17:45:54 +08:00
conf.py	doc/manual: mock up external modules for sphinx-autodoc	2015-02-05 04:31:35 -07:00
core_drivers_reference.rst	doc: some precisions about controllers	2014-10-28 11:43:06 +08:00
core_language_reference.rst	doc: fixes and add sync_struct docstrings	2015-01-19 19:20:14 +08:00
developing_a_ndsp.rst	style	2015-02-18 11:34:00 -07:00
fpga_board_ports.rst	targets/ARTIQMiniSoC: support dynamic switching of RTIO clock to XTRIG	2014-12-01 18:53:29 +08:00
getting_started.rst	refactor device/parameter management, immediate parameter updates, start introducing results	2015-01-12 18:51:23 +08:00
index.rst	clarify controller terminology	2015-02-16 08:57:15 -07:00
installing.rst	Add documentation about ARTIQ_GUI environment variable	2015-02-09 19:48:22 +08:00
management_system.rst	doc/manual/management: add short descriptions of tools	2015-02-15 14:55:15 -07:00
ndsp_reference.rst	clarify controller terminology	2015-02-16 08:57:15 -07:00
protocols_reference.rst	doc: use sphinx-argparse	2015-01-23 00:52:13 +08:00
utilities.rst	rpctool: change call syntax	2015-02-12 09:31:04 +08:00