mirror of https://github.com/m-labs/artiq
46 lines
1.4 KiB
Python
46 lines
1.4 KiB
Python
from artiq.language.core import *
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from artiq.language.types import *
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@syscall(flags={"nounwind"})
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def cache_get(key: TStr) -> TList(TInt32):
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raise NotImplementedError("syscall not simulated")
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@syscall
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def cache_put(key: TStr, value: TList(TInt32)) -> TNone:
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raise NotImplementedError("syscall not simulated")
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class CoreCache:
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"""Core device cache access"""
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def __init__(self, dmgr, core_device="core"):
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self.core = dmgr.get(core_device)
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@kernel
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def get(self, key):
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"""Extract a value from the core device cache.
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After a value is extracted, it cannot be replaced with another value using
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:meth:`put` until all kernel functions finish executing; attempting
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to replace it will result in a :class:`artiq.coredevice.exceptions.CacheError`.
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If the cache does not contain any value associated with ``key``, an empty list
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is returned.
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The value is not copied, so mutating it will change what's stored in the cache.
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:param str key: cache key
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:return: a list of 32-bit integers
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"""
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return cache_get(key)
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@kernel
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def put(self, key, value):
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"""Put a value into the core device cache. The value will persist until reboot.
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To remove a value from the cache, call :meth:`put` with an empty list.
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:param str key: cache key
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:param list value: a list of 32-bit integers
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"""
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cache_put(key, value)
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