mirror of https://github.com/m-labs/artiq.git
298 lines
10 KiB
Rust
298 lines
10 KiB
Rust
#![feature(lang_items, global_allocator)]
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#![no_std]
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extern crate alloc_list;
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extern crate std_artiq as std;
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#[macro_use]
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extern crate log;
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extern crate logger_artiq;
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#[macro_use]
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extern crate board;
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extern crate board_artiq;
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extern crate drtioaux;
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use board::csr;
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use board_artiq::{i2c, spi, si5324};
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#[cfg(has_serwb_phy_amc)]
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use board_artiq::serwb;
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#[cfg(has_hmc830_7043)]
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use board_artiq::hmc830_7043;
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fn drtio_reset(reset: bool) {
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unsafe {
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(csr::DRTIO[0].reset_write)(if reset { 1 } else { 0 });
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}
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}
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fn drtio_reset_phy(reset: bool) {
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unsafe {
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(csr::DRTIO[0].reset_phy_write)(if reset { 1 } else { 0 });
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}
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}
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fn process_aux_packet(p: &drtioaux::Packet) {
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// In the code below, *_chan_sel_write takes an u8 if there are fewer than 256 channels,
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// and u16 otherwise; hence the `as _` conversion.
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match *p {
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drtioaux::Packet::EchoRequest => drtioaux::hw::send_link(0, &drtioaux::Packet::EchoReply).unwrap(),
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drtioaux::Packet::ResetRequest { phy } => {
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if phy {
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drtio_reset_phy(true);
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drtio_reset_phy(false);
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} else {
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drtio_reset(true);
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drtio_reset(false);
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},
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drtioaux::hw::send_link(0, &drtioaux::Packet::ResetAck).unwrap();
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},
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drtioaux::Packet::RtioErrorRequest => {
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let errors;
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unsafe {
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errors = (csr::DRTIO[0].rtio_error_read)();
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}
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if errors & 1 != 0 {
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let channel;
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unsafe {
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channel = (csr::DRTIO[0].sequence_error_channel_read)();
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(csr::DRTIO[0].rtio_error_write)(1);
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}
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drtioaux::hw::send_link(0, &drtioaux::Packet::RtioErrorSequenceErrorReply { channel: channel }).unwrap();
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} else if errors & 2 != 0 {
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let channel;
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unsafe {
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channel = (csr::DRTIO[0].collision_channel_read)();
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(csr::DRTIO[0].rtio_error_write)(2);
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}
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drtioaux::hw::send_link(0, &drtioaux::Packet::RtioErrorCollisionReply { channel: channel }).unwrap();
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} else if errors & 4 != 0 {
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let channel;
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unsafe {
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channel = (board::csr::DRTIO[0].busy_channel_read)();
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(board::csr::DRTIO[0].rtio_error_write)(4);
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}
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drtioaux::hw::send_link(0, &drtioaux::Packet::RtioErrorBusyReply { channel: channel }).unwrap();
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}
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else {
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drtioaux::hw::send_link(0, &drtioaux::Packet::RtioNoErrorReply).unwrap();
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}
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}
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drtioaux::Packet::MonitorRequest { channel, probe } => {
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let value;
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#[cfg(has_rtio_moninj)]
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unsafe {
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csr::rtio_moninj::mon_chan_sel_write(channel as _);
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csr::rtio_moninj::mon_probe_sel_write(probe);
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csr::rtio_moninj::mon_value_update_write(1);
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value = csr::rtio_moninj::mon_value_read();
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}
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#[cfg(not(has_rtio_moninj))]
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{
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value = 0;
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}
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let reply = drtioaux::Packet::MonitorReply { value: value as u32 };
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drtioaux::hw::send_link(0, &reply).unwrap();
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},
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drtioaux::Packet::InjectionRequest { channel, overrd, value } => {
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#[cfg(has_rtio_moninj)]
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unsafe {
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csr::rtio_moninj::inj_chan_sel_write(channel as _);
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csr::rtio_moninj::inj_override_sel_write(overrd);
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csr::rtio_moninj::inj_value_write(value);
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}
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},
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drtioaux::Packet::InjectionStatusRequest { channel, overrd } => {
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let value;
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#[cfg(has_rtio_moninj)]
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unsafe {
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csr::rtio_moninj::inj_chan_sel_write(channel as _);
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csr::rtio_moninj::inj_override_sel_write(overrd);
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value = csr::rtio_moninj::inj_value_read();
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}
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#[cfg(not(has_rtio_moninj))]
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{
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value = 0;
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}
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let reply = drtioaux::Packet::InjectionStatusReply { value: value };
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drtioaux::hw::send_link(0, &reply).unwrap();
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},
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drtioaux::Packet::I2cStartRequest { busno } => {
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let succeeded = i2c::start(busno).is_ok();
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drtioaux::hw::send_link(0, &drtioaux::Packet::I2cBasicReply { succeeded: succeeded }).unwrap();
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}
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drtioaux::Packet::I2cRestartRequest { busno } => {
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let succeeded = i2c::restart(busno).is_ok();
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drtioaux::hw::send_link(0, &drtioaux::Packet::I2cBasicReply { succeeded: succeeded }).unwrap();
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}
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drtioaux::Packet::I2cStopRequest { busno } => {
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let succeeded = i2c::stop(busno).is_ok();
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drtioaux::hw::send_link(0, &drtioaux::Packet::I2cBasicReply { succeeded: succeeded }).unwrap();
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}
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drtioaux::Packet::I2cWriteRequest { busno, data } => {
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match i2c::write(busno, data) {
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Ok(ack) => drtioaux::hw::send_link(0, &drtioaux::Packet::I2cWriteReply { succeeded: true, ack: ack }).unwrap(),
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Err(_) => drtioaux::hw::send_link(0, &drtioaux::Packet::I2cWriteReply { succeeded: false, ack: false }).unwrap()
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};
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}
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drtioaux::Packet::I2cReadRequest { busno, ack } => {
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match i2c::read(busno, ack) {
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Ok(data) => drtioaux::hw::send_link(0, &drtioaux::Packet::I2cReadReply { succeeded: true, data: data }).unwrap(),
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Err(_) => drtioaux::hw::send_link(0, &drtioaux::Packet::I2cReadReply { succeeded: false, data: 0xff }).unwrap()
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};
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}
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drtioaux::Packet::SpiSetConfigRequest { busno, flags, write_div, read_div } => {
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let succeeded = spi::set_config(busno, flags, write_div, read_div).is_ok();
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drtioaux::hw::send_link(0, &drtioaux::Packet::SpiBasicReply { succeeded: succeeded }).unwrap();
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},
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drtioaux::Packet::SpiSetXferRequest { busno, chip_select, write_length, read_length } => {
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let succeeded = spi::set_xfer(busno, chip_select, write_length, read_length).is_ok();
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drtioaux::hw::send_link(0, &drtioaux::Packet::SpiBasicReply { succeeded: succeeded }).unwrap();
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}
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drtioaux::Packet::SpiWriteRequest { busno, data } => {
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let succeeded = spi::write(busno, data).is_ok();
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drtioaux::hw::send_link(0, &drtioaux::Packet::SpiBasicReply { succeeded: succeeded }).unwrap();
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}
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drtioaux::Packet::SpiReadRequest { busno } => {
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match spi::read(busno) {
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Ok(data) => drtioaux::hw::send_link(0, &drtioaux::Packet::SpiReadReply { succeeded: true, data: data }).unwrap(),
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Err(_) => drtioaux::hw::send_link(0, &drtioaux::Packet::SpiReadReply { succeeded: false, data: 0 }).unwrap()
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};
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}
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_ => warn!("received unexpected aux packet {:?}", p)
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}
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}
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fn process_aux_packets() {
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let pr = drtioaux::hw::recv_link(0);
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match pr {
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Ok(None) => (),
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Ok(Some(p)) => process_aux_packet(&p),
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Err(e) => warn!("aux packet error ({})", e)
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}
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}
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fn process_errors() {
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let errors;
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unsafe {
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errors = (csr::DRTIO[0].protocol_error_read)();
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(csr::DRTIO[0].protocol_error_write)(errors);
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}
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if errors & 1 != 0 {
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error!("received packet of an unknown type");
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}
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if errors & 2 != 0 {
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error!("received truncated packet");
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}
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if errors & 4 != 0 {
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error!("write underflow");
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}
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if errors & 8 != 0 {
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error!("write overflow");
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}
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}
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#[cfg(rtio_frequency = "150.0")]
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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n1_hs : 9,
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 33732,
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n31 : 9370,
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n32 : 7139,
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bwsel : 3,
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crystal_ref: true
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};
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fn drtio_link_is_up() -> bool {
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unsafe {
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(csr::DRTIO[0].link_status_read)() == 1
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}
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}
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fn startup() {
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board::clock::init();
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info!("ARTIQ satellite manager starting...");
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info!("software version {}", include_str!(concat!(env!("OUT_DIR"), "/git-describe")));
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info!("gateware version {}", board::ident::read(&mut [0; 64]));
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#[cfg(has_serwb_phy_amc)]
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serwb::wait_init();
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#[cfg(has_hmc830_7043)]
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hmc830_7043::init().expect("cannot initialize HMC830/7043");
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i2c::init();
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si5324::setup(&SI5324_SETTINGS).expect("cannot initialize Si5324");
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unsafe {
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csr::drtio_transceiver::stable_clkin_write(1);
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}
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loop {
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while !drtio_link_is_up() {
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process_errors();
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}
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info!("link is up, switching to recovered clock");
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si5324::select_ext_input(true).expect("failed to switch clocks");
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drtio_reset(false);
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drtio_reset_phy(false);
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while drtio_link_is_up() {
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process_errors();
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process_aux_packets();
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}
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drtio_reset_phy(true);
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drtio_reset(true);
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info!("link is down, switching to local crystal clock");
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si5324::select_ext_input(false).expect("failed to switch clocks");
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}
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}
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#[global_allocator]
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static mut ALLOC: alloc_list::ListAlloc = alloc_list::EMPTY;
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#[no_mangle]
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pub extern fn main() -> i32 {
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unsafe {
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extern {
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static mut _fheap: u8;
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static mut _eheap: u8;
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}
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ALLOC.add_range(&mut _fheap, &mut _eheap);
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static mut LOG_BUFFER: [u8; 65536] = [0; 65536];
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logger_artiq::BufferLogger::new(&mut LOG_BUFFER[..]).register(startup);
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0
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}
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}
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#[no_mangle]
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pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) {
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panic!("exception {:?} at PC 0x{:x}, EA 0x{:x}", vect, pc, ea)
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}
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#[no_mangle]
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pub extern fn abort() {
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println!("aborted");
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loop {}
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}
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#[no_mangle]
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#[lang = "panic_fmt"]
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pub extern fn panic_fmt(args: core::fmt::Arguments, file: &'static str, line: u32) -> ! {
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println!("panic at {}:{}: {}", file, line, args);
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loop {}
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}
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// Allow linking with crates that are built as -Cpanic=unwind even if we use -Cpanic=abort.
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// This is never called.
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#[allow(non_snake_case)]
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#[no_mangle]
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pub extern "C" fn _Unwind_Resume() -> ! {
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loop {}
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}
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