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https://github.com/m-labs/artiq.git
synced 2024-12-05 09:46:36 +08:00
Robert Jordens
a7720d05cd
* ksupport/nrt_bus * port ad9154, hmc830, hmc7043 * port local_spi and drtio_spi * port kernel_proto libdrtioaux, satman * change sayma_rtm gateware over * add spi2 NRTSPIMaster * remove spi NRTSPIMaster * change sayma device_db * change HMC830 to open mode and explicitly sequence open mode
24 lines
612 B
Python
24 lines
612 B
Python
from artiq.language.core import kernel
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class AD9154:
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"""Kernel interface to AD9154 registers, using non-realtime SPI."""
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def __init__(self, dmgr, spi_device, chip_select):
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self.core = dmgr.get("core")
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self.bus = dmgr.get(spi_device)
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self.chip_select = chip_select
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@kernel
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def setup_bus(self, div=16):
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self.bus.set_config_mu(0, 24, div, self.chip_select)
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@kernel
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def write(self, addr, data):
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self.bus.write((addr << 16) | (data<< 8))
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@kernel
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def read(self, addr):
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self.write((1 << 15) | addr, 0)
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return self.bus.read()
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