mirror of https://github.com/m-labs/artiq.git
54 lines
2.2 KiB
Rust
54 lines
2.2 KiB
Rust
use board::csr;
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unsafe fn debug_print(rtm: bool) {
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debug!("AMC serwb settings:");
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debug!(" delay_min_found: {}", csr::serwb_phy_amc::control_delay_min_found_read());
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debug!(" delay_min: {}", csr::serwb_phy_amc::control_delay_min_read());
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debug!(" delay_max_found: {}", csr::serwb_phy_amc::control_delay_max_found_read());
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debug!(" delay_max: {}", csr::serwb_phy_amc::control_delay_max_read());
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debug!(" delay: {}", csr::serwb_phy_amc::control_delay_read());
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debug!(" bitslip: {}", csr::serwb_phy_amc::control_bitslip_read());
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debug!(" ready: {}", csr::serwb_phy_amc::control_ready_read());
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debug!(" error: {}", csr::serwb_phy_amc::control_error_read());
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if rtm {
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debug!("RTM serwb settings:");
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debug!(" delay_min_found: {}", csr::serwb_phy_rtm::control_delay_min_found_read());
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debug!(" delay_min: {}", csr::serwb_phy_rtm::control_delay_min_read());
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debug!(" delay_max_found: {}", csr::serwb_phy_rtm::control_delay_max_found_read());
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debug!(" delay_max: {}", csr::serwb_phy_rtm::control_delay_max_read());
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debug!(" delay: {}", csr::serwb_phy_rtm::control_delay_read());
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debug!(" bitslip: {}", csr::serwb_phy_rtm::control_bitslip_read());
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debug!(" ready: {}", csr::serwb_phy_rtm::control_ready_read());
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debug!(" error: {}", csr::serwb_phy_rtm::control_error_read());
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}
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}
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pub fn wait_init() {
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info!("waiting for AMC/RTM serwb bridge to be ready...");
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unsafe {
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csr::serwb_phy_amc::control_reset_write(1);
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while csr::serwb_phy_amc::control_ready_read() == 0 {
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if csr::serwb_phy_amc::control_error_read() == 1 {
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debug_print(false);
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warn!("AMC/RTM serwb bridge initialization failed, retrying.");
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csr::serwb_phy_amc::control_reset_write(1);
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}
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}
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}
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info!("done.");
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// Try reading the identifier register on the other side of the bridge.
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let rtm_identifier = unsafe {
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csr::rtm_identifier::identifier_read()
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};
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if rtm_identifier != 0x5352544d {
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error!("incorrect RTM identifier: 0x{:08x}", rtm_identifier);
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// proceed anyway
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}
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unsafe {
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debug_print(true);
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}
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}
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