2
0
mirror of https://github.com/m-labs/artiq.git synced 2025-02-17 21:11:56 +08:00
artiq/artiq/gateware/rtio/phy
2016-02-29 16:44:11 +01:00
..
__init__.py rtio: refactor, use rtlink 2015-04-14 19:44:45 +08:00
dds.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
spi.py rtio.spi: drop unused argument 2016-02-28 21:06:20 +01:00
ttl_serdes_7series.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
ttl_serdes_generic.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
ttl_serdes_spartan6.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
ttl_simple.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
wishbone.py Revert "gateware/rt2wb: only input when active" 2016-02-29 16:44:11 +01:00