mirror of https://github.com/m-labs/artiq
35 lines
1.0 KiB
Python
35 lines
1.0 KiB
Python
import unittest
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from artiq.experiment import *
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from artiq.test.hardware_testbench import ExperimentCase
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from artiq.language.core import kernel, delay
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from artiq.language.units import us
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class PhaserExperiment(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("phaser0")
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@kernel
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def run(self):
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self.core.reset()
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# The Phaser initialization performs a comprehensive test:
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# * Fastlink bringup
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# * Fastlink error counter
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# * Board identification
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# * Hardware identification
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# * SPI write, readback, timing
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# * Temperature readout
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# * DAC identification, IOTEST, alarm sweep, PLL configuration, FIFO
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# alignmend
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# * DUC+Oscillator configuration, data end-to-end verification and
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# readback
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# * Attenuator write and readback
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# * TRF bringup PLL locking
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self.phaser0.init()
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class PhaserTest(ExperimentCase):
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def test(self):
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self.execute(PhaserExperiment)
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