mirror of https://github.com/m-labs/artiq
869 lines
34 KiB
Python
Executable File
869 lines
34 KiB
Python
Executable File
#!/usr/bin/env python3
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import argparse
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import sys
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import textwrap
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from collections import defaultdict
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from itertools import count, filterfalse
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from artiq import __version__ as artiq_version
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from artiq.coredevice import jsondesc
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from artiq.coredevice.phaser import PHASER_GW_MIQRO, PHASER_GW_BASE
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def get_cpu_target(description):
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if description.get("type", None) == "shuttler":
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return "rv32g"
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if description["target"] == "kasli":
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if description["hw_rev"] in ("v1.0", "v1.1"):
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return "rv32ima"
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else:
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return "rv32g"
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elif description["target"] == "kasli_soc":
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return "cortexa9"
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else:
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raise NotImplementedError
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def get_num_leds(description):
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drtio_role = description["drtio_role"]
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target = description["target"]
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hw_rev = description["hw_rev"]
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kasli_board_leds = {
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"v1.0": 4,
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"v1.1": 6,
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"v2.0": 3
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}
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if target == "kasli":
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if hw_rev in ("v1.0", "v1.1") and drtio_role != "standalone":
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# LEDs are used for DRTIO status on v1.0 and v1.1
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return kasli_board_leds[hw_rev] - 3
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return kasli_board_leds[hw_rev]
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elif target == "kasli_soc":
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return 2
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else:
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raise ValueError
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def process_header(output, description):
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print(textwrap.dedent("""
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# Autogenerated for the {variant} variant
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core_addr = "{core_addr}"
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device_db = {{
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"core": {{
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {{
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"host": core_addr,
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"ref_period": {ref_period},
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"analyzer_proxy": "core_analyzer",
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"target": "{cpu_target}",
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"satellite_cpu_targets": {{}}
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}},
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}},
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"core_log": {{
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"type": "controller",
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"host": "::1",
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"port": 1068,
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"command": "aqctl_corelog -p {{port}} --bind {{bind}} " + core_addr
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}},
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"core_moninj": {{
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"type": "controller",
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"host": "::1",
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"port_proxy": 1383,
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"port": 1384,
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"command": "aqctl_moninj_proxy --port-proxy {{port_proxy}} --port-control {{port}} --bind {{bind}} " + core_addr
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}},
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"core_analyzer": {{
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"type": "controller",
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"host": "::1",
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"port_proxy": 1385,
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"port": 1386,
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"command": "aqctl_coreanalyzer_proxy --port-proxy {{port_proxy}} --port-control {{port}} --bind {{bind}} " + core_addr
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}},
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"core_cache": {{
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache"
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}},
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"core_dma": {{
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"type": "local",
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"module": "artiq.coredevice.dma",
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"class": "CoreDMA"
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}},
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"i2c_switch0": {{
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "I2CSwitch",
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"arguments": {{"address": 0xe0}}
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}},
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"i2c_switch1": {{
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "I2CSwitch",
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"arguments": {{"address": 0xe2}}
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}},
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}}
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""").format(
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variant=description["variant"],
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core_addr=description["core_addr"],
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ref_period=1/(8*description["rtio_frequency"]),
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cpu_target=get_cpu_target(description)),
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file=output)
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class PeripheralManager:
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def __init__(self, output, primary_description):
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self.counts = defaultdict(int)
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self.output = output
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self.primary_description = primary_description
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def get_name(self, ty):
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count = self.counts[ty]
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self.counts[ty] = count + 1
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return "{}{}".format(ty, count)
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def gen(self, string, **kwargs):
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print(textwrap.dedent(string).format(**kwargs), file=self.output)
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def process_dio(self, rtio_offset, peripheral, num_channels=8):
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class_names = {
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"input": "TTLInOut",
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"output": "TTLOut",
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"clkgen": "TTLClockGen"
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}
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classes = [
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class_names[peripheral["bank_direction_low"]],
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class_names[peripheral["bank_direction_high"]]
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]
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channel = count(0)
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name = [self.get_name("ttl") for _ in range(num_channels)]
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for i in range(num_channels):
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self.gen("""
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "{class_name}",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}""",
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name=name[i],
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class_name=classes[i // 4],
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channel=rtio_offset + next(channel))
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if peripheral["edge_counter"]:
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for i in range(num_channels):
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class_name = classes[i // 4]
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if class_name == "TTLInOut":
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self.gen("""
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device_db["{name}_counter"] = {{
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"type": "local",
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"module": "artiq.coredevice.edge_counter",
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"class": "EdgeCounter",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}""",
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name=name[i],
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channel=rtio_offset + next(channel))
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return next(channel)
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def process_dio_spi(self, rtio_offset, peripheral):
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channel = count(0)
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for spi in peripheral["spi"]:
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self.gen("""
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=self.get_name(spi["name"]),
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channel=rtio_offset + next(channel))
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for ttl in peripheral["ttl"]:
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ttl_class_names = {
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"input": "TTLInOut",
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"output": "TTLOut"
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}
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name = self.get_name(ttl["name"])
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self.gen("""
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "{class_name}",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}""",
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name=name,
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class_name=ttl_class_names[ttl["direction"]],
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channel=rtio_offset + next(channel))
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if ttl["edge_counter"]:
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self.gen("""
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device_db["{name}_counter"] = {{
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"type": "local",
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"module": "artiq.coredevice.edge_counter",
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"class": "EdgeCounter",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}""",
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name=name,
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channel=rtio_offset + next(channel))
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return next(channel)
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def process_urukul(self, rtio_offset, peripheral):
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urukul_name = self.get_name("urukul")
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synchronization = peripheral["synchronization"]
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channel = count(0)
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pll_en = peripheral["pll_en"]
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clk_div = peripheral.get("clk_div")
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if clk_div is None:
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clk_div = 0 if pll_en else 1
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self.gen("""
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device_db["eeprom_{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.kasli_i2c",
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"class": "KasliEEPROM",
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"arguments": {{"port": "EEM{eem}"}}
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}}
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device_db["spi_{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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eem=peripheral["ports"][0],
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channel=rtio_offset+next(channel))
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if synchronization:
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self.gen("""
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device_db["ttl_{name}_sync"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {{"channel": 0x{channel:06x}, "acc_width": 4}}
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}}""",
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name=urukul_name,
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channel=rtio_offset+next(channel))
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self.gen("""
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device_db["ttl_{name}_io_update"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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channel=rtio_offset+next(channel))
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if len(peripheral["ports"]) > 1:
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for i in range(4):
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self.gen("""
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device_db["ttl_{name}_sw{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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uchn=i,
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channel=rtio_offset+next(channel))
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self.gen("""
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device_db["{name}_cpld"] = {{
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {{
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"spi_device": "spi_{name}",
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"sync_device": {sync_device},
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"io_update_device": "ttl_{name}_io_update",
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"refclk": {refclk},
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"clk_sel": {clk_sel},
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"clk_div": {clk_div}
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}}
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}}""",
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name=urukul_name,
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sync_device="\"ttl_{name}_sync\"".format(name=urukul_name) if synchronization else "None",
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refclk=peripheral.get("refclk", self.primary_description["rtio_frequency"]),
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clk_sel=peripheral["clk_sel"],
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clk_div=clk_div)
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dds = peripheral["dds"]
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pll_vco = peripheral.get("pll_vco")
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for i in range(4):
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if dds == "ad9910":
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self.gen("""
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device_db["{name}_ch{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {{
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"pll_n": {pll_n},
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"pll_en": {pll_en},
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"chip_select": {chip_select},
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"cpld_device": "{name}_cpld"{sw}{pll_vco}{sync_delay_seed}{io_update_delay}
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}}
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}}""",
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name=urukul_name,
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chip_select=4 + i,
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uchn=i,
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sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "",
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pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
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pll_n=peripheral.get("pll_n", 32), pll_en=pll_en,
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sync_delay_seed=",\n \"sync_delay_seed\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "",
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io_update_delay=",\n \"io_update_delay\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "")
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elif dds == "ad9912":
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self.gen("""
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device_db["{name}_ch{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {{
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"pll_n": {pll_n},
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"pll_en": {pll_en},
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"chip_select": {chip_select},
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"cpld_device": "{name}_cpld"{sw}{pll_vco}
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}}
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}}""",
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name=urukul_name,
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chip_select=4 + i,
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uchn=i,
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sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "",
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pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
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pll_n=peripheral.get("pll_n", 8), pll_en=pll_en)
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else:
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raise ValueError
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return next(channel)
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def process_mirny(self, rtio_offset, peripheral):
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legacy_almazny = ("v1.0", "v1.1")
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mirny_name = self.get_name("mirny")
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channel = count(0)
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self.gen("""
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device_db["spi_{name}"]={{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=mirny_name,
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channel=rtio_offset+next(channel))
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for i in range(4):
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self.gen("""
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device_db["ttl_{name}_sw{mchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{ttl_channel:06x}}}
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}}""",
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name=mirny_name,
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mchn=i,
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ttl_channel=rtio_offset+next(channel))
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for i in range(4):
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self.gen("""
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device_db["{name}_ch{mchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.adf5356",
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"class": "ADF5356",
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"arguments": {{
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"channel": {mchn},
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"sw_device": "ttl_{name}_sw{mchn}",
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"cpld_device": "{name}_cpld",
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}}
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}}""",
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name=mirny_name,
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mchn=i)
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if peripheral["almazny"] and peripheral["almazny_hw_rev"] not in legacy_almazny:
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self.gen("""
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device_db["{name}_almazny{i}"] = {{
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"type": "local",
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"module": "artiq.coredevice.almazny",
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"class": "AlmaznyChannel",
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"arguments": {{
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"host_mirny": "{name}_cpld",
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"channel": {i},
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}},
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}}""",
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name=mirny_name,
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i=i)
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clk_sel = peripheral["clk_sel"]
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if isinstance(peripheral["clk_sel"], str):
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clk_sel = '"' + peripheral["clk_sel"] + '"'
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self.gen("""
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device_db["{name}_cpld"] = {{
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"type": "local",
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"module": "artiq.coredevice.mirny",
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"class": "Mirny",
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"arguments": {{
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"spi_device": "spi_{name}",
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"refclk": {refclk},
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"clk_sel": {clk_sel}
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}},
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}}""",
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name=mirny_name,
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refclk=peripheral["refclk"],
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clk_sel=clk_sel)
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if peripheral["almazny"] and peripheral["almazny_hw_rev"] in legacy_almazny:
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self.gen("""
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device_db["{name}_almazny"] = {{
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"type": "local",
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"module": "artiq.coredevice.almazny",
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"class": "AlmaznyLegacy",
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"arguments": {{
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"host_mirny": "{name}_cpld",
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}},
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}}""",
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name=mirny_name)
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return next(channel)
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def process_novogorny(self, rtio_offset, peripheral):
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self.gen("""
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device_db["spi_{name}_adc"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{adc_channel:06x}}}
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}}
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device_db["ttl_{name}_cnv"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{cnv_channel:06x}}},
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}}
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.novogorny",
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"class": "Novogorny",
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"arguments": {{
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"spi_adc_device": "spi_{name}_adc",
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"cnv_device": "ttl_{name}_cnv"
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}}
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}}""",
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name=self.get_name("novogorny"),
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adc_channel=rtio_offset,
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cnv_channel=rtio_offset + 1)
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return 2
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def process_sampler(self, rtio_offset, peripheral):
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self.gen("""
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device_db["spi_{name}_adc"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{adc_channel:06x}}}
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}}
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device_db["spi_{name}_pgia"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{pgia_channel:06x}}}
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}}
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device_db["ttl_{name}_cnv"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{cnv_channel:06x}}},
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}}
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.sampler",
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"class": "Sampler",
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"arguments": {{
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"spi_adc_device": "spi_{name}_adc",
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"spi_pgia_device": "spi_{name}_pgia",
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"cnv_device": "ttl_{name}_cnv",
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"hw_rev": "{hw_rev}"
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}}
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}}""",
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name=self.get_name("sampler"),
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hw_rev=peripheral.get("hw_rev", "v2.2"),
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adc_channel=rtio_offset,
|
|
pgia_channel=rtio_offset + 1,
|
|
cnv_channel=rtio_offset + 2)
|
|
return 3
|
|
|
|
def process_suservo(self, rtio_offset, peripheral):
|
|
suservo_name = self.get_name("suservo")
|
|
sampler_name = self.get_name("sampler")
|
|
urukul_names = [self.get_name("urukul") for _ in range(2)]
|
|
channel = count(0)
|
|
for i in range(8):
|
|
self.gen("""
|
|
device_db["{suservo_name}_ch{suservo_chn}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.suservo",
|
|
"class": "Channel",
|
|
"arguments": {{"channel": 0x{suservo_channel:06x}, "servo_device": "{suservo_name}"}}
|
|
}}""",
|
|
suservo_name=suservo_name,
|
|
suservo_chn=i,
|
|
suservo_channel=rtio_offset+next(channel))
|
|
self.gen("""
|
|
device_db["{suservo_name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.suservo",
|
|
"class": "SUServo",
|
|
"arguments": {{
|
|
"channel": 0x{suservo_channel:06x},
|
|
"pgia_device": "spi_{sampler_name}_pgia",
|
|
"cpld_devices": {cpld_names_list},
|
|
"dds_devices": {dds_names_list},
|
|
"sampler_hw_rev": "{sampler_hw_rev}"
|
|
}}
|
|
}}""",
|
|
suservo_name=suservo_name,
|
|
sampler_name=sampler_name,
|
|
sampler_hw_rev=peripheral["sampler_hw_rev"],
|
|
cpld_names_list=[urukul_name + "_cpld" for urukul_name in urukul_names],
|
|
dds_names_list=[urukul_name + "_dds" for urukul_name in urukul_names],
|
|
suservo_channel=rtio_offset+next(channel))
|
|
self.gen("""
|
|
device_db["spi_{sampler_name}_pgia"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.spi2",
|
|
"class": "SPIMaster",
|
|
"arguments": {{"channel": 0x{sampler_channel:06x}}}
|
|
}}""",
|
|
sampler_name=sampler_name,
|
|
sampler_channel=rtio_offset+next(channel))
|
|
pll_vco = peripheral.get("pll_vco")
|
|
for urukul_name in urukul_names:
|
|
self.gen("""
|
|
device_db["spi_{urukul_name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.spi2",
|
|
"class": "SPIMaster",
|
|
"arguments": {{"channel": 0x{urukul_channel:06x}}}
|
|
}}
|
|
device_db["{urukul_name}_cpld"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.urukul",
|
|
"class": "CPLD",
|
|
"arguments": {{
|
|
"spi_device": "spi_{urukul_name}",
|
|
"refclk": {refclk},
|
|
"clk_sel": {clk_sel}
|
|
}}
|
|
}}
|
|
device_db["{urukul_name}_dds"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.ad9910",
|
|
"class": "AD9910",
|
|
"arguments": {{
|
|
"pll_n": {pll_n},
|
|
"pll_en": {pll_en},
|
|
"chip_select": 3,
|
|
"cpld_device": "{urukul_name}_cpld"{pll_vco}
|
|
}}
|
|
}}""",
|
|
urukul_name=urukul_name,
|
|
urukul_channel=rtio_offset+next(channel),
|
|
refclk=peripheral.get("refclk", self.primary_description["rtio_frequency"]),
|
|
clk_sel=peripheral["clk_sel"],
|
|
pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
|
|
pll_n=peripheral["pll_n"], pll_en=peripheral["pll_en"])
|
|
return next(channel)
|
|
|
|
def process_zotino(self, rtio_offset, peripheral):
|
|
self.gen("""
|
|
device_db["spi_{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.spi2",
|
|
"class": "SPIMaster",
|
|
"arguments": {{"channel": 0x{spi_channel:06x}}}
|
|
}}
|
|
device_db["ttl_{name}_ldac"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.ttl",
|
|
"class": "TTLOut",
|
|
"arguments": {{"channel": 0x{ldac_channel:06x}}}
|
|
}}
|
|
device_db["ttl_{name}_clr"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.ttl",
|
|
"class": "TTLOut",
|
|
"arguments": {{"channel": 0x{clr_channel:06x}}}
|
|
}}
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.zotino",
|
|
"class": "Zotino",
|
|
"arguments": {{
|
|
"spi_device": "spi_{name}",
|
|
"ldac_device": "ttl_{name}_ldac",
|
|
"clr_device": "ttl_{name}_clr"
|
|
}}
|
|
}}""",
|
|
name=self.get_name("zotino"),
|
|
spi_channel=rtio_offset,
|
|
ldac_channel=rtio_offset + 1,
|
|
clr_channel=rtio_offset + 2)
|
|
return 3
|
|
|
|
def process_grabber(self, rtio_offset, peripheral):
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.grabber",
|
|
"class": "Grabber",
|
|
"arguments": {{"channel_base": 0x{channel:06x}}}
|
|
}}""",
|
|
name=self.get_name("grabber"),
|
|
channel=rtio_offset)
|
|
return 2
|
|
|
|
def process_fastino(self, rtio_offset, peripheral):
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.fastino",
|
|
"class": "Fastino",
|
|
"arguments": {{"channel": 0x{channel:06x}, "log2_width": {log2_width}}}
|
|
}}""",
|
|
name=self.get_name("fastino"),
|
|
channel=rtio_offset,
|
|
log2_width=peripheral["log2_width"])
|
|
return 1
|
|
|
|
def process_phaser(self, rtio_offset, peripheral):
|
|
mode = peripheral["mode"]
|
|
if mode == "miqro":
|
|
dac = f', "dac": {{"pll_m": 16, "pll_n": 3, "interpolation": 2}}, "gw_rev": {PHASER_GW_MIQRO}'
|
|
n_channels = 3
|
|
else:
|
|
dac = f', "gw_rev": {PHASER_GW_BASE}'
|
|
n_channels = 5
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.phaser",
|
|
"class": "Phaser",
|
|
"arguments": {{
|
|
"channel_base": 0x{channel:06x},
|
|
"miso_delay": 1{dac}
|
|
}}
|
|
}}""",
|
|
name=self.get_name("phaser"),
|
|
dac=dac,
|
|
channel=rtio_offset)
|
|
return n_channels
|
|
|
|
def process_hvamp(self, rtio_offset, peripheral):
|
|
hvamp_name = self.get_name("hvamp")
|
|
for i in range(8):
|
|
self.gen("""
|
|
device_db["ttl_{name}_sw{ch}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.ttl",
|
|
"class": "TTLOut",
|
|
"arguments": {{"channel": 0x{channel:06x}}}
|
|
}}""",
|
|
name=hvamp_name,
|
|
ch=i,
|
|
channel=rtio_offset+i)
|
|
return 8
|
|
|
|
def process_shuttler(self, shuttler_peripheral):
|
|
shuttler_name = self.get_name("shuttler")
|
|
rtio_offset = shuttler_peripheral["drtio_destination"] << 16
|
|
rtio_offset += self.add_board_leds(rtio_offset, board_name=shuttler_name)
|
|
|
|
channel = count(0)
|
|
self.gen("""
|
|
device_db["{name}_config"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.shuttler",
|
|
"class": "Config",
|
|
"arguments": {{"channel": 0x{channel:06x}}},
|
|
}}""",
|
|
name=shuttler_name,
|
|
channel=rtio_offset + next(channel))
|
|
self.gen("""
|
|
device_db["{name}_trigger"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.shuttler",
|
|
"class": "Trigger",
|
|
"arguments": {{"channel": 0x{channel:06x}}},
|
|
}}""",
|
|
name=shuttler_name,
|
|
channel=rtio_offset + next(channel))
|
|
for i in range(16):
|
|
self.gen("""
|
|
device_db["{name}_dcbias{ch}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.shuttler",
|
|
"class": "DCBias",
|
|
"arguments": {{"channel": 0x{channel:06x}}},
|
|
}}""",
|
|
name=shuttler_name,
|
|
ch=i,
|
|
channel=rtio_offset + next(channel))
|
|
self.gen("""
|
|
device_db["{name}_dds{ch}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.shuttler",
|
|
"class": "DDS",
|
|
"arguments": {{"channel": 0x{channel:06x}}},
|
|
}}""",
|
|
name=shuttler_name,
|
|
ch=i,
|
|
channel=rtio_offset + next(channel))
|
|
|
|
device_class_names = ["Relay", "ADC"]
|
|
for i, device_name in enumerate(device_class_names):
|
|
spi_name = "{name}_spi{ch}".format(
|
|
name=shuttler_name,
|
|
ch=i)
|
|
self.gen("""
|
|
device_db["{spi}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.spi2",
|
|
"class": "SPIMaster",
|
|
"arguments": {{"channel": 0x{channel:06x}}},
|
|
}}""",
|
|
spi=spi_name,
|
|
channel=rtio_offset + next(channel))
|
|
self.gen("""
|
|
device_db["{name}_{device}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.shuttler",
|
|
"class": "{dev_class}",
|
|
"arguments": {{"spi_device": "{spi}"}},
|
|
}}""",
|
|
name=shuttler_name,
|
|
device=device_name.lower(),
|
|
dev_class=device_name,
|
|
spi=spi_name)
|
|
return 0
|
|
|
|
def process(self, rtio_offset, peripheral):
|
|
processor = getattr(self, "process_"+str(peripheral["type"]))
|
|
return processor(rtio_offset, peripheral)
|
|
|
|
def add_board_leds(self, rtio_offset, board_name=None, num_leds=2):
|
|
for i in range(num_leds):
|
|
if board_name is None:
|
|
led_name = self.get_name("led")
|
|
else:
|
|
led_name = self.get_name("{}_led".format(board_name))
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.ttl",
|
|
"class": "TTLOut",
|
|
"arguments": {{"channel": 0x{channel:06x}}}
|
|
}}""",
|
|
name=led_name,
|
|
channel=rtio_offset+i)
|
|
return num_leds
|
|
|
|
|
|
def split_drtio_eem(peripherals):
|
|
# Shuttler is the only peripheral that uses DRTIO-over-EEM at this moment
|
|
drtio_eem_filter = lambda peripheral: peripheral["type"] == "shuttler"
|
|
return filterfalse(drtio_eem_filter, peripherals), \
|
|
list(filter(drtio_eem_filter, peripherals))
|
|
|
|
|
|
def process(output, primary_description, satellites):
|
|
drtio_role = primary_description["drtio_role"]
|
|
if drtio_role not in ("standalone", "master"):
|
|
raise ValueError("Invalid primary node DRTIO role")
|
|
|
|
if drtio_role == "standalone" and satellites:
|
|
raise ValueError("A standalone system cannot have satellites")
|
|
|
|
process_header(output, primary_description)
|
|
|
|
pm = PeripheralManager(output, primary_description)
|
|
|
|
local_peripherals, drtio_peripherals = split_drtio_eem(primary_description["peripherals"])
|
|
|
|
print("# {} peripherals".format(drtio_role), file=output)
|
|
rtio_offset = 0
|
|
for peripheral in local_peripherals:
|
|
n_channels = pm.process(rtio_offset, peripheral)
|
|
rtio_offset += n_channels
|
|
|
|
num_leds = get_num_leds(primary_description)
|
|
pm.add_board_leds(rtio_offset, num_leds=num_leds)
|
|
rtio_offset += num_leds
|
|
|
|
for destination, description in satellites:
|
|
if description["drtio_role"] != "satellite":
|
|
raise ValueError("Invalid DRTIO role for satellite at destination {}".format(destination))
|
|
peripherals, satellite_drtio_peripherals = split_drtio_eem(description["peripherals"])
|
|
drtio_peripherals.extend(satellite_drtio_peripherals)
|
|
|
|
print(textwrap.dedent("""
|
|
# DEST#{dest} peripherals
|
|
|
|
device_db["core"]["arguments"]["satellite_cpu_targets"][{dest}] = \"{target}\"""").format(
|
|
dest=destination,
|
|
target=get_cpu_target(description)),
|
|
file=output)
|
|
rtio_offset = destination << 16
|
|
for peripheral in peripherals:
|
|
n_channels = pm.process(rtio_offset, peripheral)
|
|
rtio_offset += n_channels
|
|
|
|
num_leds = get_num_leds(description)
|
|
pm.add_board_leds(rtio_offset, num_leds=num_leds)
|
|
rtio_offset += num_leds
|
|
|
|
for i, peripheral in enumerate(drtio_peripherals):
|
|
if not("drtio_destination" in peripheral):
|
|
if primary_description["target"] == "kasli":
|
|
if primary_description["hw_rev"] in ("v1.0", "v1.1"):
|
|
peripheral["drtio_destination"] = 3 + i
|
|
else:
|
|
peripheral["drtio_destination"] = 4 + i
|
|
elif primary_description["target"] == "kasli_soc":
|
|
peripheral["drtio_destination"] = 5 + i
|
|
else:
|
|
raise NotImplementedError
|
|
print(textwrap.dedent("""
|
|
# DEST#{dest} peripherals
|
|
|
|
device_db["core"]["arguments"]["satellite_cpu_targets"][{dest}] = \"{target}\"""").format(
|
|
dest=peripheral["drtio_destination"],
|
|
target=get_cpu_target(peripheral)),
|
|
file=output)
|
|
processor = getattr(pm, "process_"+str(peripheral["type"]))
|
|
processor(peripheral)
|
|
|
|
|
|
def main():
|
|
parser = argparse.ArgumentParser(
|
|
description="ARTIQ device database template builder")
|
|
parser.add_argument("--version", action="version",
|
|
version="ARTIQ v{}".format(artiq_version),
|
|
help="print the ARTIQ version number")
|
|
parser.add_argument("primary_description", metavar="PRIMARY_DESCRIPTION",
|
|
help="JSON system description file for the primary (standalone or master) node")
|
|
parser.add_argument("-o", "--output",
|
|
help="output file, defaults to standard output if omitted")
|
|
parser.add_argument("-s", "--satellite", nargs=2, action="append",
|
|
default=[], metavar=("DESTINATION", "DESCRIPTION"), type=str,
|
|
help="add DRTIO satellite at the given destination number with "
|
|
"devices from the given JSON description")
|
|
|
|
args = parser.parse_args()
|
|
|
|
primary_description = jsondesc.load(args.primary_description)
|
|
|
|
satellites = []
|
|
for destination, description_path in args.satellite:
|
|
satellite_description = jsondesc.load(description_path)
|
|
satellites.append((int(destination, 0), satellite_description))
|
|
|
|
if args.output is not None:
|
|
with open(args.output, "w") as f:
|
|
process(f, primary_description, satellites)
|
|
else:
|
|
process(sys.stdout, primary_description, satellites)
|
|
|
|
|
|
if __name__ == "__main__":
|
|
main()
|