conda: pin openocd build

c.f. 4c22d64e

RELEASE_NOTES.rst

@@ -3,13 +3,39 @@
 Release notes
 =============
 
+3.4
+---
+
+No further notes.
+
+
+3.3
+---
+
+No further notes.
+
+
+3.2
+---
+
+* To accommodate larger runtimes, the flash layout as changed. As a result, the
+  contents of the flash storage will be lost when upgrading. Set the values back
+  (IP, MAC address, startup kernel, etc.) after the upgrade.
+
+
+3.1
+---
+
+No further notes.
+
+
 3.0
 ---
 
-* The --embed option of applets is replaced with the environment variable
+* The ``--embed`` option of applets is replaced with the environment variable
   ``ARTIQ_APPLET_EMBED``. The GUI sets this enviroment variable itself and the
   user simply needs to remove the ``--embed`` argument.
-* EnvExperiment's prepare calls prepare for all its children.
+* ``EnvExperiment``'s ``prepare`` calls ``prepare`` for all its children.
 * Dynamic ``__getattr__``'s returning RPC target methods are not supported anymore.
   Controller driver classes must define all their methods intended for RPC as
   members.
@@ -22,7 +48,7 @@ Release notes
 * The DDS class names and setup options have changed, this requires an update of
   the device database.
 * ``int(a, width=b)`` has been removed. Use ``int32(a)`` and ``int64(a)``.
-* The kc705 gateware target has been renamed kc705_dds.
+* The KC705 gateware target has been renamed ``kc705_dds``.
 * ``artiq.coredevice.comm_tcp`` has been renamed ``artiq.coredevice.comm_kernel``,
   and ``Comm`` has been renamed ``CommKernel``.
 * The "collision" and "busy" RTIO errors are reported through the log instead of
@@ -38,8 +64,8 @@ Release notes
   identifiers (``true``, ``null``, ...) with their Python equivalents
   (``True``, ``None`` ...).
 * Controllers are now named ``aqctl_XXX`` instead of ``XXX_controller``.
-* In the device database, the "comm" device has been folded into the "core" device.
+* In the device database, the ``comm`` device has been folded into the ``core`` device.
-  Move the "host" argument into the "core" device, and remove the "comm" device.
+  Move the "host" argument into the ``core`` device, and remove the ``comm`` device.
 * The core device log now contains important information about events such as
   RTIO collisions. A new controller ``aqctl_corelog`` must be running to forward
   those logs to the master. See the example device databases to see how to
@@ -52,8 +78,15 @@ Release notes
   at https://github.com/m-labs/pdq. All SPI/USB driver layers, Mediator,
   CompoundPDQ and examples/documentation has been moved.
 * The master now rotates log files at midnight, rather than based on log size.
-* The results keys start_time and run_time are now stored as doubles of UNIX time,
+* The results keys ``start_time`` and ``run_time`` are now stored as doubles of UNIX time,
   rather than ints. The file names are still based on local time.
+* Packages are no longer available for 32-bit Windows.
+
+
+2.5
+---
+
+No further notes.
 
 
 2.4
@@ -62,7 +95,6 @@ Release notes
 No further notes.
 
 
-
 2.3
 ---
 

artiq/compiler/targets.py

@@ -216,8 +216,12 @@ class Target:
                 filename, line = location.rsplit(":", 1)
                 if filename == "??" or filename == "<synthesized>":
                     continue
+                if line == "?":
+                    line = -1
+                else:
+                    line = int(line)
                 # can't get column out of addr2line D:
-                backtrace.append((filename, int(line), -1, function, address))
+                backtrace.append((filename, line, -1, function, address))
             return backtrace
 
     def demangle(self, names):

artiq/compiler/transforms/artiq_ir_generator.py

@@ -1289,6 +1289,10 @@ class ARTIQIRGenerator(algorithm.Visitor):
             return self.append(ir.Select(cond,
                         ir.Constant(False, builtins.TBool()),
                         ir.Constant(True,  builtins.TBool())))
+        elif isinstance(node.op, ast.Invert):
+            operand = self.visit(node.operand)
+            return self.append(ir.Arith(ast.BitXor(loc=None),
+                                        ir.Constant(-1, operand.type), operand))
         elif isinstance(node.op, ast.USub):
             operand = self.visit(node.operand)
             return self.append(ir.Arith(ast.Sub(loc=None),
@@ -1319,7 +1323,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
                     lambda: self.alloc_exn(builtins.TException("ValueError"),
                         ir.Constant("shift amount must be nonnegative", builtins.TStr())),
                     loc=node.right.loc)
-            elif isinstance(node.op, (ast.Div, ast.FloorDiv)):
+            elif isinstance(node.op, (ast.Div, ast.FloorDiv, ast.Mod)):
                 self._make_check(
                     self.append(ir.Compare(ast.NotEq(loc=None), rhs, ir.Constant(0, rhs.type))),
                     lambda: self.alloc_exn(builtins.TException("ZeroDivisionError"),
@@ -1721,7 +1725,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
             self.polymorphic_print([self.visit(prefix)],
                                    separator=" ", suffix="\x1E", as_rtio=True)
             self.polymorphic_print([self.visit(arg) for arg in args],
-                                   separator=" ", suffix="\n\x1D", as_rtio=True)
+                                   separator=" ", suffix="\x1D", as_rtio=True)
             return ir.Constant(None, builtins.TNone())
         elif types.is_builtin(typ, "delay"):
             if len(node.args) == 1 and len(node.keywords) == 0:
@@ -1808,7 +1812,8 @@ class ARTIQIRGenerator(algorithm.Visitor):
 
             assert None not in args
 
-        if self.unwind_target is None:
+        if self.unwind_target is None or \
+                types.is_c_function(callee.type) and "nounwind" in callee.type.flags:
             insn = self.append(ir.Call(func, args, arg_exprs))
         else:
             after_invoke = self.add_block("invoke")

artiq/compiler/transforms/inferencer.py

@@ -682,6 +682,11 @@ class Inferencer(algorithm.Visitor):
                 pass
             else:
                 diagnose(valid_forms())
+        elif types.is_builtin(typ, "str"):
+            diag = diagnostic.Diagnostic("error",
+                "strings currently cannot be constructed", {},
+                node.loc)
+            self.engine.process(diag)
         elif types.is_builtin(typ, "list") or types.is_builtin(typ, "array"):
             if types.is_builtin(typ, "list"):
                 valid_forms = lambda: [

artiq/compiler/transforms/llvm_ir_generator.py

@@ -22,7 +22,7 @@ llptr      = ll.IntType(8).as_pointer()
 llptrptr   = ll.IntType(8).as_pointer().as_pointer()
 llslice    = ll.LiteralStructType([llptr, lli32])
 llsliceptr = ll.LiteralStructType([llptr, lli32]).as_pointer()
-llmetadata = ll.MetaData()
+llmetadata = ll.MetaDataType()
 
 
 def memoize(generator):
@@ -270,7 +270,7 @@ class LLVMIRGenerator:
             sanitized_str = re.sub(rb"[^a-zA-Z0-9_.]", b"", as_bytes[:20]).decode('ascii')
             name = self.llmodule.get_unique_name("S.{}".format(sanitized_str))
 
-        llstr = self.llmodule.get_global(name)
+        llstr = self.llmodule.globals.get(name)
         if llstr is None:
             llstrty = ll.ArrayType(lli8, len(as_bytes))
             llstr = ll.GlobalVariable(self.llmodule, llstrty, name)
@@ -306,7 +306,7 @@ class LLVMIRGenerator:
             assert False
 
     def llbuiltin(self, name):
-        llglobal = self.llmodule.get_global(name)
+        llglobal = self.llmodule.globals.get(name)
         if llglobal is not None:
             return llglobal
 
@@ -326,6 +326,12 @@ class LLVMIRGenerator:
             llty = ll.FunctionType(llptr, [])
         elif name == "llvm.stackrestore":
             llty = ll.FunctionType(llvoid, [llptr])
+        elif name == "__py_modsi3":
+            llty = ll.FunctionType(lli32, [lli32, lli32])
+        elif name == "__py_moddi3":
+            llty = ll.FunctionType(lli64, [lli64, lli64])
+        elif name == "__py_moddf3":
+            llty = ll.FunctionType(lldouble, [lldouble, lldouble])
         elif name == self.target.print_function:
             llty = ll.FunctionType(llvoid, [llptr], var_arg=True)
         elif name == "rtio_log":
@@ -363,13 +369,96 @@ class LLVMIRGenerator:
                         "watchdog_set", "watchdog_clear",
                         self.target.print_function):
                 llglobal.attributes.add("nounwind")
+            if name.find("__py_") == 0:
+                llglobal.linkage = 'linkonce_odr'
+                self.emit_intrinsic(name, llglobal)
         else:
             llglobal = ll.GlobalVariable(self.llmodule, llty, name)
 
         return llglobal
 
+    def emit_intrinsic(self, name, llfun):
+        llbuilder = ll.IRBuilder()
+        llbuilder.position_at_end(llfun.append_basic_block("entry"))
+
+        if name == "__py_modsi3" or name == "__py_moddi3":
+            if name == "__py_modsi3":
+                llty = lli32
+            elif name == "__py_moddi3":
+                llty = lli64
+            else:
+                assert False
+
+            """
+            Reference Objects/intobject.c
+                xdivy = x / y;
+                xmody = (long)(x - (unsigned long)xdivy * y);
+                /* If the signs of x and y differ, and the remainder is non-0,
+                 * C89 doesn't define whether xdivy is now the floor or the
+                 * ceiling of the infinitely precise quotient.  We want the floor,
+                 * and we have it iff the remainder's sign matches y's.
+                 */
+                if (xmody && ((y ^ xmody) < 0) /* i.e. and signs differ */) {
+                    xmody += y;
+                    // ...
+                }
+            """
+            llx, lly = llfun.args
+            llxdivy = llbuilder.sdiv(llx, lly)
+            llxremy = llbuilder.srem(llx, lly)
+
+            llxmodynonzero = llbuilder.icmp_signed('!=', llxremy, ll.Constant(llty, 0))
+            lldiffsign = llbuilder.icmp_signed('<', llbuilder.xor(llx, lly), ll.Constant(llty, 0))
+
+            llcond = llbuilder.and_(llxmodynonzero, lldiffsign)
+            with llbuilder.if_then(llcond):
+                llbuilder.ret(llbuilder.add(llxremy, lly))
+            llbuilder.ret(llxremy)
+        elif name == "__py_moddf3":
+            """
+            Reference Objects/floatobject.c
+                mod = fmod(vx, wx);
+                /* fmod is typically exact, so vx-mod is *mathematically* an
+                   exact multiple of wx.  But this is fp arithmetic, and fp
+                   vx - mod is an approximation; the result is that div may
+                   not be an exact integral value after the division, although
+                   it will always be very close to one.
+                */
+                // ...
+                if (mod) {
+                    /* ensure the remainder has the same sign as the denominator */
+                    if ((wx < 0) != (mod < 0)) {
+                        mod += wx;
+                        // ...
+                    }
+                }
+                else {
+                    /* the remainder is zero, and in the presence of signed zeroes
+                       fmod returns different results across platforms; ensure
+                       it has the same sign as the denominator; we'd like to do
+                       "mod = wx * 0.0", but that may get optimized away */
+                    mod *= mod;  /* hide "mod = +0" from optimizer */
+                    if (wx < 0.0)
+                        mod = -mod;
+                }
+            """
+            llv, llw = llfun.args
+            llrem = llbuilder.frem(llv, llw)
+
+            llremnonzero = llbuilder.fcmp_unordered('!=', llrem, ll.Constant(lldouble, 0.0))
+            llwltzero = llbuilder.fcmp_ordered('<', llw, ll.Constant(lldouble, 0.0))
+            llremltzero = llbuilder.fcmp_ordered('<', llrem, ll.Constant(lldouble, 0.0))
+            lldiffsign = llbuilder.icmp_unsigned('!=', llwltzero, llremltzero)
+
+            llcond = llbuilder.and_(llremnonzero, lldiffsign)
+            with llbuilder.if_then(llcond):
+                llbuilder.ret(llbuilder.fadd(llrem, llw))
+            llbuilder.ret(llrem)
+        else:
+            assert False
+
     def get_function(self, typ, name):
-        llfun = self.llmodule.get_global(name)
+        llfun = self.llmodule.globals.get(name)
         if llfun is None:
             llfunty = self.llty_of_type(typ, bare=True)
             llfun   = ll.Function(self.llmodule, llfunty, name)
@@ -410,7 +499,7 @@ class LLVMIRGenerator:
         llobjects = defaultdict(lambda: [])
 
         for obj_id, obj_ref, obj_typ in self.embedding_map.iter_objects():
-            llobject = self.llmodule.get_global("O.{}".format(obj_id))
+            llobject = self.llmodule.globals.get("O.{}".format(obj_id))
             if llobject is not None:
                 llobjects[obj_typ].append(llobject.bitcast(llptr))
 
@@ -905,22 +994,15 @@ class LLVMIRGenerator:
                 return self.llbuilder.sdiv(self.map(insn.lhs()), self.map(insn.rhs()),
                                            name=insn.name)
         elif isinstance(insn.op, ast.Mod):
-            # Python only has the modulo operator, LLVM only has the remainder
-            if builtins.is_float(insn.type):
-                llvalue = self.llbuilder.frem(self.map(insn.lhs()), self.map(insn.rhs()))
-                self.add_fast_math_flags(llvalue)
-                return self.llbuilder.call(self.llbuiltin("llvm.copysign.f64"),
-                                           [llvalue, self.map(insn.rhs())],
-                                           name=insn.name)
-            else:
             lllhs, llrhs = map(self.map, (insn.lhs(), insn.rhs()))
-                llxorsign = self.llbuilder.and_(self.llbuilder.xor(lllhs, llrhs),
+            if builtins.is_float(insn.type):
-                                                ll.Constant(lllhs.type, 1 << lllhs.type.width - 1))
+                intrinsic = "__py_moddf3"
-                llnegate = self.llbuilder.icmp_unsigned('!=',
+            elif builtins.is_int32(insn.type):
-                                                        llxorsign, ll.Constant(llxorsign.type, 0))
+                intrinsic = "__py_modsi3"
-                llvalue = self.llbuilder.srem(lllhs, llrhs)
+            elif builtins.is_int64(insn.type):
-                llnegvalue = self.llbuilder.sub(ll.Constant(llvalue.type, 0), llvalue)
+                intrinsic = "__py_moddi3"
-                return self.llbuilder.select(llnegate, llnegvalue, llvalue)
+            return self.llbuilder.call(self.llbuiltin(intrinsic), [lllhs, llrhs],
+                                       name=insn.name)
         elif isinstance(insn.op, ast.Pow):
             if builtins.is_float(insn.type):
                 return self.llbuilder.call(self.llbuiltin("llvm.pow.f64"),
@@ -1127,7 +1209,7 @@ class LLVMIRGenerator:
                 llargs.append(llarg)
 
         llfunname = insn.target_function().type.name
-        llfun     = self.llmodule.get_global(llfunname)
+        llfun     = self.llmodule.globals.get(llfunname)
         if llfun is None:
             llretty = self.llty_of_type(insn.type, for_return=True)
             if self.needs_sret(llretty):
@@ -1366,9 +1448,8 @@ class LLVMIRGenerator:
             llcall = self.llbuilder.invoke(llfun, llargs, llnormalblock, llunwindblock,
                                            name=insn.name)
 
-            # See the comment in process_Call.
+            # The !tbaa metadata is not legal to use with the invoke instruction,
-            if types.is_c_function(functiontyp) and 'nowrite' in functiontyp.flags:
+            # so unlike process_Call, we do not set it here.
-                llcall.set_metadata('tbaa', self.tbaa_nowrite_call)
 
         return llcall
 
@@ -1561,7 +1642,7 @@ class LLVMIRGenerator:
 
             llclauseexnname = self.llconst_of_const(
                 ir.Constant(exnname, builtins.TStr()))
-            llclauseexnnameptr = self.llmodule.get_global("exn.{}".format(exnname))
+            llclauseexnnameptr = self.llmodule.globals.get("exn.{}".format(exnname))
             if llclauseexnnameptr is None:
                 llclauseexnnameptr = ll.GlobalVariable(self.llmodule, llclauseexnname.type,
                                                        name="exn.{}".format(exnname))

artiq/compiler/validators/escape.py

@@ -298,8 +298,8 @@ class EscapeValidator(algorithm.Visitor):
     # and exceptions can only refer to strings, so we don't actually check
     # this property. But we will need to, if string operations are ever added.
 
-    def visit_assignment(self, target, value, is_aug_assign=False):
+    def visit_assignment(self, target, value):
-        value_region  = self._region_of(value) if not is_aug_assign else self.youngest_region
+        value_region  = self._region_of(value)
 
         # If this is a variable, we might need to contract the live range.
         if isinstance(value_region, Region):
@@ -316,19 +316,11 @@ class EscapeValidator(algorithm.Visitor):
         target_regions = [self._region_of(name) for name in target_names]
         for target_region in target_regions:
             if not Region.outlives(value_region, target_region):
-                if is_aug_assign:
-                    target_desc = "the assignment target, allocated here,"
-                else:
-                    target_desc = "the assignment target"
-                note = diagnostic.Diagnostic("note",
-                    "this expression has type {type}",
-                    {"type": types.TypePrinter().name(value.type)},
-                    value.loc)
                 diag = diagnostic.Diagnostic("error",
                     "the assigned value does not outlive the assignment target", {},
                     value.loc, [target.loc],
                     notes=self._diagnostics_for(target_region, target.loc,
-                                                target_desc) +
+                                                "the assignment target") +
                           self._diagnostics_for(value_region, value.loc,
                                                 "the assigned value"))
                 self.engine.process(diag)
@@ -339,9 +331,19 @@ class EscapeValidator(algorithm.Visitor):
 
     def visit_AugAssign(self, node):
         if builtins.is_allocated(node.target.type):
-            # If the target is mutable, op-assignment will allocate
+            note = diagnostic.Diagnostic("note",
-            # in the youngest region.
+                "try using `{lhs} = {lhs} {op} {rhs}` instead",
-            self.visit_assignment(node.target, node.value, is_aug_assign=True)
+                {"lhs": node.target.loc.source(),
+                 "rhs": node.value.loc.source(),
+                 "op": node.op.loc.source()[:-1]},
+                node.loc)
+            diag = diagnostic.Diagnostic("error",
+                "values cannot be mutated in-place", {},
+                node.op.loc, [node.target.loc],
+                notes=[note])
+            self.engine.process(diag)
+
+        self.visit_assignment(node.target, node.value)
 
     def visit_Return(self, node):
         region = self._region_of(node.value)

artiq/coredevice/sawg.py

@@ -32,7 +32,7 @@ class Config:
     Exposes the configurable quantities of a single SAWG channel.
 
     Access to the configuration registers for a SAWG channel can not
-    be concurrent. There must be at least :attr:_rtio_interval` machine
+    be concurrent. There must be at least :attr:`_rtio_interval` machine
     units of delay between accesses. Replacement is not supported and will be
     lead to an ``RTIOCollision`` as this is likely a programming error.
     All methods therefore advance the timeline by the duration of one

artiq/examples/master/device_db.py

@@ -2,7 +2,7 @@
 # The RTIO channel numbers here are for NIST CLOCK on KC705.
 # The list of devices here is not exhaustive.
 
-core_addr = "kc705.lab.m-labs.hk"
+core_addr = "kc705-1.lab.m-labs.hk"
 
 device_db = {
     "core": {
@@ -33,7 +33,7 @@ device_db = {
         "class": "DDSGroupAD9914",
         "arguments": {
             "sysclk": 3e9,
-            "first_dds_bus_channel": 26,
+            "first_dds_bus_channel": 27,
             "dds_bus_count": 2,
             "dds_channel_count": 3
         }

artiq/firmware/Cargo.lock

@@ -1,7 +1,3 @@
-[root]
-name = "std_artiq"
-version = "0.0.0"
-
 [[package]]
 name = "alloc_list"
 version = "0.0.0"
@@ -17,23 +13,28 @@ dependencies = [
  "board 0.0.0",
 ]
 
+[[package]]
+name = "backtrace_artiq"
+version = "0.0.0"
+
 [[package]]
 name = "board"
 version = "0.0.0"
 dependencies = [
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "build_artiq"
 version = "0.0.0"
 dependencies = [
- "walkdir 1.0.3 (registry+https://github.com/rust-lang/crates.io-index)",
+ "walkdir 1.0.7 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "byteorder"
-version = "1.0.0"
+version = "1.2.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [[package]]
@@ -41,7 +42,7 @@ name = "compiler_builtins"
 version = "0.1.0"
 source = "git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568#631b5687b24af413fdbffa4c2644484e60660b00"
 dependencies = [
- "gcc 0.3.42 (registry+https://github.com/rust-lang/crates.io-index)",
+ "gcc 0.3.54 (registry+https://github.com/rust-lang/crates.io-index)",
  "rustc-cfg 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
@@ -55,8 +56,8 @@ name = "drtioaux"
 version = "0.0.0"
 dependencies = [
  "board 0.0.0",
- "byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
+ "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
  "std_artiq 0.0.0",
 ]
 
@@ -69,12 +70,12 @@ name = "fringe"
 version = "1.1.0"
 source = "git+https://github.com/m-labs/libfringe?rev=bd23494#bd2349467157969324ca7da5d2ae033c7ffac0c0"
 dependencies = [
- "libc 0.2.18 (registry+https://github.com/rust-lang/crates.io-index)",
+ "libc 0.2.34 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "gcc"
-version = "0.3.42"
+version = "0.3.54"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [[package]]
@@ -94,7 +95,7 @@ dependencies = [
  "amp 0.0.0",
  "board 0.0.0",
  "build_artiq 0.0.0",
- "byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
+ "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
  "cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "dyld 0.0.0",
  "proto 0.0.0",
@@ -103,12 +104,12 @@ dependencies = [
 
 [[package]]
 name = "libc"
-version = "0.2.18"
+version = "0.2.34"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [[package]]
 name = "log"
-version = "0.3.6"
+version = "0.3.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [[package]]
@@ -121,23 +122,23 @@ name = "logger_artiq"
 version = "0.0.0"
 dependencies = [
  "board 0.0.0",
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
  "log_buffer 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "managed"
-version = "0.4.0"
+version = "0.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [[package]]
 name = "proto"
 version = "0.0.0"
 dependencies = [
- "byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
+ "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
  "cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "dyld 0.0.0",
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
  "std_artiq 0.0.0",
 ]
 
@@ -147,17 +148,18 @@ version = "0.0.0"
 dependencies = [
  "alloc_list 0.0.0",
  "amp 0.0.0",
+ "backtrace_artiq 0.0.0",
  "board 0.0.0",
  "build_artiq 0.0.0",
- "byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
+ "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
  "compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568)",
  "cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "drtioaux 0.0.0",
  "fringe 1.1.0 (git+https://github.com/m-labs/libfringe?rev=bd23494)",
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
  "logger_artiq 0.0.0",
  "proto 0.0.0",
- "smoltcp 0.4.0 (git+https://github.com/m-labs/smoltcp?rev=6f5ae33)",
+ "smoltcp 0.4.0 (git+https://github.com/m-labs/smoltcp?rev=181083f)",
  "std_artiq 0.0.0",
 ]
 
@@ -166,6 +168,15 @@ name = "rustc-cfg"
 version = "0.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
+[[package]]
+name = "same-file"
+version = "0.1.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+dependencies = [
+ "kernel32-sys 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "winapi 0.2.8 (registry+https://github.com/rust-lang/crates.io-index)",
+]
+
 [[package]]
 name = "satman"
 version = "0.0.0"
@@ -175,7 +186,7 @@ dependencies = [
  "build_artiq 0.0.0",
  "compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568)",
  "drtioaux 0.0.0",
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
  "logger_artiq 0.0.0",
  "std_artiq 0.0.0",
 ]
@@ -183,19 +194,24 @@ dependencies = [
 [[package]]
 name = "smoltcp"
 version = "0.4.0"
-source = "git+https://github.com/m-labs/smoltcp?rev=6f5ae33#6f5ae33501827d57926469c6f1a860205a24f7ae"
+source = "git+https://github.com/m-labs/smoltcp?rev=181083f#181083f18c977b8a0463a67e360e4db20594fa21"
 dependencies = [
- "byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
+ "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
- "log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
+ "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
- "managed 0.4.0 (registry+https://github.com/rust-lang/crates.io-index)",
+ "managed 0.5.0 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
+[[package]]
+name = "std_artiq"
+version = "0.0.0"
+
 [[package]]
 name = "walkdir"
-version = "1.0.3"
+version = "1.0.7"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "kernel32-sys 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "same-file 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)",
  "winapi 0.2.8 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
@@ -210,18 +226,19 @@ version = "0.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [metadata]
-"checksum byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)" = "c40977b0ee6b9885c9013cd41d9feffdd22deb3bb4dc3a71d901cc7a77de18c8"
+"checksum byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "652805b7e73fada9d85e9a6682a4abd490cb52d96aeecc12e33a0de34dfd0d23"
 "checksum compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568)" = "<none>"
 "checksum cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0f8cb7306107e4b10e64994de6d3274bd08996a7c1322a27b86482392f96be0a"
 "checksum fringe 1.1.0 (git+https://github.com/m-labs/libfringe?rev=bd23494)" = "<none>"
-"checksum gcc 0.3.42 (registry+https://github.com/rust-lang/crates.io-index)" = "291055c78f59ca3d84c99026c9501c469413d386bb46be1e1cf1d285cd1db3b0"
+"checksum gcc 0.3.54 (registry+https://github.com/rust-lang/crates.io-index)" = "5e33ec290da0d127825013597dbdfc28bee4964690c7ce1166cbc2a7bd08b1bb"
 "checksum kernel32-sys 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "7507624b29483431c0ba2d82aece8ca6cdba9382bff4ddd0f7490560c056098d"
-"checksum libc 0.2.18 (registry+https://github.com/rust-lang/crates.io-index)" = "a51822fc847e7a8101514d1d44e354ba2ffa7d4c194dcab48870740e327cac70"
+"checksum libc 0.2.34 (registry+https://github.com/rust-lang/crates.io-index)" = "36fbc8a8929c632868295d0178dd8f63fc423fd7537ad0738372bd010b3ac9b0"
-"checksum log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)" = "ab83497bf8bf4ed2a74259c1c802351fcd67a65baa86394b6ba73c36f4838054"
+"checksum log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)" = "880f77541efa6e5cc74e76910c9884d9859683118839d6a1dc3b11e63512565b"
 "checksum log_buffer 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "ec57723b84bbe7bdf76aa93169c9b59e67473317c6de3a83cb2a0f8ccb2aa493"
-"checksum managed 0.4.0 (registry+https://github.com/rust-lang/crates.io-index)" = "b5d48e8c30a4363e2981fe4db20527f6ab0f32a243bbc75379dea5a64f60dae4"
+"checksum managed 0.5.0 (registry+https://github.com/rust-lang/crates.io-index)" = "786bd3519bdfb0e1a57146a74b7584555dd6c4f1b6e1137c70e177d60dde8186"
 "checksum rustc-cfg 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = "56a596b5718bf5e059d59a30af12f7f462a152de147aa462b70892849ee18704"
-"checksum smoltcp 0.4.0 (git+https://github.com/m-labs/smoltcp?rev=6f5ae33)" = "<none>"
+"checksum same-file 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)" = "d931a44fdaa43b8637009e7632a02adc4f2b2e0733c08caa4cf00e8da4a117a7"
-"checksum walkdir 1.0.3 (registry+https://github.com/rust-lang/crates.io-index)" = "dd7c16466ecc507c7cb5988db03e6eab4aaeab89a5c37a29251fcfd3ac9b7afe"
+"checksum smoltcp 0.4.0 (git+https://github.com/m-labs/smoltcp?rev=181083f)" = "<none>"
+"checksum walkdir 1.0.7 (registry+https://github.com/rust-lang/crates.io-index)" = "bb08f9e670fab86099470b97cd2b252d6527f0b3cc1401acdb595ffc9dd288ff"
 "checksum winapi 0.2.8 (registry+https://github.com/rust-lang/crates.io-index)" = "167dc9d6949a9b857f3451275e911c3f44255842c1f7a76f33c55103a909087a"
 "checksum winapi-build 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)" = "2d315eee3b34aca4797b2da6b13ed88266e6d612562a0c46390af8299fc699bc"

artiq/firmware/Cargo.toml

@@ -1,2 +1,5 @@
 [workspace]
 members = ["runtime", "ksupport", "satman"]
+
+[profile.dev]
+debug = 1 # either 0 or 2 cause an LLVM ICE

artiq/firmware/bootloader/Cargo.toml

@@ -0,0 +1,24 @@
+[package]
+authors = ["M-Labs"]
+name = "bootloader"
+version = "0.0.0"
+build = "build.rs"
+
+[lib]
+name = "bootloader"
+crate-type = ["staticlib"]
+path = "main.rs"
+
+[build-dependencies]
+build_misoc = { path = "../libbuild_misoc" }
+
+[dependencies]
+byteorder = { version = "1.0", default-features = false }
+crc = { version = "1.7", default-features = false }
+board = { path = "../libboard", features = ["uart_console", "smoltcp"] }
+
+[dependencies.smoltcp]
+git = "https://github.com/m-labs/smoltcp"
+rev = "181083f"
+default-features = false
+features = ["proto-ipv4", "socket-tcp"]

artiq/firmware/ksupport/Makefile

@@ -5,7 +5,6 @@ CFLAGS += \
 	-I$(LIBUNWIND_DIRECTORY) \
 	-I$(LIBUNWIND_DIRECTORY)/../unwinder/include \
 	-I$(MISOC_DIRECTORY)/software/include/dyld
-CFLAGS += -DNDEBUG
 
 LDFLAGS += --eh-frame-hdr \
 	-L../libcompiler-rt \
@@ -15,22 +14,15 @@ LDFLAGS += --eh-frame-hdr \
 
 RUSTFLAGS += -Cpanic=unwind
 
-all: ksupport.elf
+all:: ksupport.elf
 
 .PHONY: $(RUSTOUT)/libksupport.a
 $(RUSTOUT)/libksupport.a:
 	$(cargo) --manifest-path $(KSUPPORT_DIRECTORY)/Cargo.toml
 
 ksupport.elf: $(RUSTOUT)/libksupport.a glue.o
-	$(LD) $(LDFLAGS) -T $(KSUPPORT_DIRECTORY)/ksupport.ld -o $@ $^ \
+	$(link) -T $(KSUPPORT_DIRECTORY)/ksupport.ld \
-		-lunwind -lcompiler-rt -lbase -lm
+		-lunwind-elf -lcompiler-rt -lbase -lm
-	@chmod -x $@
 
 %.o: $(KSUPPORT_DIRECTORY)/%.c
 	$(compile)
-
-clean:
-	$(RM) *.o ksupport.elf
-	$(RM) -rf cargo
-
-.PHONY: all clean

artiq/firmware/ksupport/lib.rs

@@ -167,7 +167,7 @@ extern fn rpc_recv(slot: *mut ()) -> usize {
     })
 }
 
-fn terminate(exception: &eh::Exception, mut backtrace: &mut [usize]) -> ! {
+fn terminate(exception: &eh::Exception, backtrace: &mut [usize]) -> ! {
     let mut cursor = 0;
     for index in 0..backtrace.len() {
         if backtrace[index] > kernel_proto::KERNELCPU_PAYLOAD_ADDRESS {
@@ -333,7 +333,7 @@ extern fn dma_record_output_wide(timestamp: i64, channel: i32, address: i32, wor
         if DMA_RECORDER.buffer.len() - DMA_RECORDER.data_len < length {
             dma_record_flush()
         }
-        let mut dst = &mut DMA_RECORDER.buffer[DMA_RECORDER.data_len..
+        let dst = &mut DMA_RECORDER.buffer[DMA_RECORDER.data_len..
                                            DMA_RECORDER.data_len + length];
         dst[..header_length].copy_from_slice(&header[..]);
         dst[header_length..].copy_from_slice(&data[..]);

artiq/firmware/ksupport/rtio.rs

@@ -140,18 +140,19 @@ pub fn log(timestamp: i64, data: &[u8]) {
         for i in 0..data.len() {
             word <<= 8;
             word |= data[i] as u32;
-            if i % 4 == 0 {
+            if i % 4 == 3 {
                 rtio_o_data_write(0, word);
                 csr::rtio::o_we_write(1);
                 word = 0;
             }
         }
 
-        word <<= 8;
+        if word != 0 {
             rtio_o_data_write(0, word);
             csr::rtio::o_we_write(1);
         }
     }
+}
 
 #[cfg(not(has_rtio_log))]
 pub fn log(_timestamp: i64, _data: &[u8]) {}

artiq/firmware/liballoc_list/lib.rs

@@ -104,19 +104,17 @@ unsafe impl<'a> Alloc for &'a ListAlloc {
     }
 
     fn oom(&mut self, err: AllocErr) -> ! {
-        panic!("cannot allocate: {:?}", err)
+        panic!("heap view: {}\ncannot allocate: {:?}", self, err)
     }
 }
 
-impl ListAlloc {
+impl fmt::Display for ListAlloc {
-    pub fn debug_dump(&self, f: &mut fmt::Write) -> fmt::Result {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
         unsafe {
             let mut total_busy = 0;
             let mut total_idle = 0;
             let mut total_meta = 0;
 
-            write!(f, "Heap view:\n")?;
-
             let mut curr = self.root;
             while !curr.is_null() {
                 total_meta += mem::size_of::<Header>();

artiq/firmware/libbacktrace_artiq/Cargo.toml

@@ -0,0 +1,8 @@
+[package]
+authors = ["M-Labs"]
+name = "backtrace_artiq"
+version = "0.0.0"
+
+[lib]
+name = "backtrace_artiq"
+path = "lib.rs"

artiq/firmware/libbacktrace_artiq/lib.rs

@@ -0,0 +1,30 @@
+#![feature(libc, panic_unwind)]
+#![no_std]
+
+extern crate unwind;
+extern crate libc;
+
+use unwind as uw;
+use libc::c_void;
+
+pub fn backtrace<F>(mut f: F) -> Result<(), uw::_Unwind_Reason_Code>
+    where F: FnMut(usize) -> ()
+{
+    extern fn trace<F>(context: *mut uw::_Unwind_Context, arg: *mut c_void)
+                      -> uw::_Unwind_Reason_Code
+        where F: FnMut(usize) -> ()
+    {
+        unsafe {
+            let step_fn = &mut *(arg as *mut F);
+            step_fn(uw::_Unwind_GetIP(context));
+            uw::_URC_NO_REASON
+        }
+    }
+
+    unsafe {
+        match uw::_Unwind_Backtrace(trace::<F>, &mut f as *mut _ as *mut c_void) {
+            uw::_URC_NO_REASON => Ok(()),
+            err => Err(err)
+        }
+    }
+}

artiq/firmware/libboard/Cargo.toml

@@ -9,6 +9,7 @@ name = "board"
 path = "lib.rs"
 
 [dependencies]
+byteorder = { version = "1.0", default-features = false }
 log = { version = "0.3", default-features = false }
 
 [features]

artiq/firmware/libboard/config.rs

@@ -0,0 +1,232 @@
+#[cfg(has_spiflash)]
+mod imp {
+    use core::str;
+    use byteorder::{ByteOrder, BigEndian};
+    use cache;
+    use spiflash;
+
+    // One flash sector immediately before the firmware.
+    const ADDR: usize = ::mem::FLASH_BOOT_ADDRESS - spiflash::SECTOR_SIZE;
+    const SIZE: usize = spiflash::SECTOR_SIZE;
+
+    mod lock {
+        use core::slice;
+        use core::sync::atomic::{AtomicUsize, Ordering, ATOMIC_USIZE_INIT};
+
+        static LOCKED: AtomicUsize = ATOMIC_USIZE_INIT;
+
+        pub struct Lock;
+
+        impl Lock {
+            pub fn take() -> Result<Lock, ()> {
+                if LOCKED.swap(1, Ordering::SeqCst) != 0 {
+                    Err(()) // already locked
+                } else {
+                    Ok(Lock) // locked now
+                }
+            }
+
+            pub fn data(&self) -> &'static [u8] {
+                unsafe { slice::from_raw_parts(super::ADDR as *const u8, super::SIZE) }
+            }
+        }
+
+        impl Drop for Lock {
+            fn drop(&mut self) {
+                LOCKED.store(0, Ordering::SeqCst)
+            }
+        }
+    }
+
+    use self::lock::Lock;
+
+    #[derive(Clone)]
+    struct Iter<'a> {
+        data:   &'a [u8],
+        offset: usize
+    }
+
+    impl<'a> Iter<'a> {
+        fn new(data: &'a [u8]) -> Iter<'a> {
+            Iter { data: data, offset: 0 }
+        }
+    }
+
+    impl<'a> Iterator for Iter<'a> {
+        type Item = Result<(&'a [u8], &'a [u8]), ()>;
+
+        fn next(&mut self) -> Option<Self::Item> {
+            let data = &self.data[self.offset..];
+
+            if data.len() < 4 {
+                error!("offset {}: truncated record", self.offset);
+                return Some(Err(()))
+            }
+
+            let record_size = BigEndian::read_u32(data) as usize;
+            if record_size == !0 /* all ones; erased flash */ {
+                return None
+            } else if record_size < 4 || record_size > data.len() {
+                error!("offset {}: invalid record size {}", self.offset, record_size);
+                return Some(Err(()))
+            }
+
+            let record_body = &data[4..record_size];
+            match record_body.iter().position(|&x| x == 0) {
+                None => {
+                    error!("offset {}: missing separator", self.offset);
+                    Some(Err(()))
+                }
+                Some(pos) => {
+                    self.offset += record_size;
+
+                    let (key, zero_and_value) = record_body.split_at(pos);
+                    Some(Ok((key, &zero_and_value[1..])))
+                }
+            }
+        }
+    }
+
+    pub fn read<F: FnOnce(Result<&[u8], ()>) -> R, R>(key: &str, f: F) -> R {
+        f(Lock::take().and_then(|lock| {
+            let mut iter = Iter::new(lock.data());
+            let mut value = &[][..];
+            while let Some(result) = iter.next() {
+                let (record_key, record_value) = result?;
+                if key.as_bytes() == record_key {
+                    // last write wins
+                    value = record_value
+                }
+            }
+            Ok(value)
+        }))
+    }
+
+    pub fn read_str<F: FnOnce(Result<&str, ()>) -> R, R>(key: &str, f: F) -> R {
+        read(key, |result| {
+            f(result.and_then(|value| str::from_utf8(value).map_err(|_| ())))
+        })
+    }
+
+    unsafe fn append_at<'a>(mut data: &'a [u8], key: &[u8], value: &[u8]) -> Result<&'a [u8], ()> {
+        let record_size = 4 + key.len() + 1 + value.len();
+        if data.len() < record_size {
+            return Err(())
+        }
+
+        let mut record_size_bytes = [0u8; 4];
+        BigEndian::write_u32(&mut record_size_bytes[..], record_size as u32);
+
+        spiflash::write(data.as_ptr() as usize, &record_size_bytes[..]);
+        data = &data[record_size_bytes.len()..];
+
+        spiflash::write(data.as_ptr() as usize, key);
+        data = &data[key.len()..];
+
+        spiflash::write(data.as_ptr() as usize, &[0]);
+        data = &data[1..];
+
+        spiflash::write(data.as_ptr() as usize, value);
+        data = &data[value.len()..];
+
+        cache::flush_l2_cache();
+
+        Ok(data)
+    }
+
+    fn compact() -> Result<(), ()> {
+        let lock = Lock::take()?;
+
+        static mut OLD_DATA: [u8; SIZE] = [0; SIZE];
+        let old_data = unsafe {
+            OLD_DATA.copy_from_slice(lock.data());
+            &OLD_DATA[..]
+        };
+
+        let mut data = lock.data();
+        unsafe { spiflash::erase_sector(data.as_ptr() as usize) };
+
+        // This is worst-case quadratic, but we're limited by a small SPI flash sector size,
+        // so it does not really matter.
+        let mut iter = Iter::new(old_data);
+        while let Some(result) = iter.next() {
+            let (key, mut value) = result?;
+
+            let mut next_iter = iter.clone();
+            while let Some(next_result) = next_iter.next() {
+                let (next_key, next_value) = next_result?;
+                if key == next_key {
+                    value = next_value
+                }
+            }
+            data = unsafe { append_at(data, key, value)? };
+        }
+
+        Ok(())
+    }
+
+    fn append(key: &str, value: &[u8]) -> Result<(), ()> {
+        let lock = Lock::take()?;
+
+        let free = {
+            let mut iter = Iter::new(lock.data());
+            while let Some(result) = iter.next() {
+                let _ = result?;
+            }
+            &iter.data[iter.offset..]
+        };
+
+        unsafe { append_at(free, key.as_bytes(), value)? };
+
+        Ok(())
+    }
+
+    pub fn write(key: &str, value: &[u8]) -> Result<(), ()> {
+        match append(key, value) {
+            Ok(()) => (),
+            Err(()) => {
+                compact()?;
+                append(key, value)?;
+            }
+        }
+        Ok(())
+    }
+
+    pub fn remove(key: &str) -> Result<(), ()> {
+        write(key, &[])
+    }
+
+    pub fn erase() -> Result<(), ()> {
+        let lock = Lock::take()?;
+
+        unsafe { spiflash::erase_sector(lock.data().as_ptr() as usize) };
+        cache::flush_l2_cache();
+
+        Ok(())
+    }
+}
+
+#[cfg(not(has_spiflash))]
+mod imp {
+    pub fn read<F: FnOnce(Result<&[u8], ()>) -> R, R>(_key: &str, f: F) -> R {
+        f(Err(()))
+    }
+
+    pub fn read_str<F: FnOnce(Result<&str, ()>) -> R, R>(_key: &str, f: F) -> R {
+        f(Err(()))
+    }
+
+    pub fn write(_key: &str, _value: &[u8]) -> Result<(), ()> {
+        Err(())
+    }
+
+    pub fn remove(_key: &str) -> Result<(), ()> {
+        Err(())
+    }
+
+    pub fn erase() -> Result<(), ()> {
+        Err(())
+    }
+}
+
+pub use self::imp::*;

artiq/firmware/libboard/lib.rs

@@ -1,6 +1,7 @@
 #![feature(asm, lang_items)]
 #![no_std]
 
+extern crate byteorder;
 #[macro_use]
 extern crate log;
 
@@ -18,6 +19,7 @@ pub mod uart_console;
 
 #[cfg(has_spiflash)]
 pub mod spiflash;
+pub mod config;
 
 pub mod i2c;
 pub mod spi;

artiq/firmware/libboard/spiflash.rs

@@ -3,6 +3,11 @@
 use core::cmp;
 use csr;
 
+pub const SECTOR_SIZE: usize = csr::CONFIG_SPIFLASH_SECTOR_SIZE as usize;
+pub const PAGE_SIZE:   usize = csr::CONFIG_SPIFLASH_PAGE_SIZE   as usize;
+
+const PAGE_MASK: usize = PAGE_SIZE - 1;
+
 const CMD_PP:   u8 = 0x02;
 const CMD_WRDI: u8 = 0x04;
 const CMD_RDSR: u8 = 0x05;
@@ -15,8 +20,7 @@ const PIN_DQ_I: u8 = 1 << 3;
 
 const SR_WIP:   u8 = 1;
 
-fn write_byte(mut byte: u8) {
+unsafe fn write_byte(mut byte: u8) {
-    unsafe {
     csr::spiflash::bitbang_write(0);
     for _ in 0..8 {
         csr::spiflash::bitbang_write((byte & 0x80) >> 7);
@@ -25,10 +29,8 @@ fn write_byte(mut byte: u8) {
     }
     csr::spiflash::bitbang_write(0);
 }
-}
 
-fn write_addr(mut addr: usize) {
+unsafe fn write_addr(mut addr: usize) {
-    unsafe {
     csr::spiflash::bitbang_write(0);
     for _ in 0..24 {
         csr::spiflash::bitbang_write(((addr & 0x800000) >> 23) as u8);
@@ -37,7 +39,6 @@ fn write_addr(mut addr: usize) {
     }
     csr::spiflash::bitbang_write(0);
 }
-}
 
 fn wait_until_ready() {
     unsafe {
@@ -59,8 +60,7 @@ fn wait_until_ready() {
     }
 }
 
-pub fn erase_sector(addr: usize) {
+pub unsafe fn erase_sector(addr: usize) {
-    unsafe {
     let sector_addr = addr & !(csr::CONFIG_SPIFLASH_SECTOR_SIZE as usize - 1);
 
     csr::spiflash::bitbang_en_write(1);
@@ -78,10 +78,8 @@ pub fn erase_sector(addr: usize) {
 
     csr::spiflash::bitbang_en_write(0);
 }
-}
 
-fn write_page(addr: usize, data: &[u8]) {
+unsafe fn write_page(addr: usize, data: &[u8]) {
-    unsafe {
     csr::spiflash::bitbang_en_write(1);
 
     wait_until_ready();
@@ -101,12 +99,8 @@ fn write_page(addr: usize, data: &[u8]) {
 
     csr::spiflash::bitbang_en_write(0);
 }
-}
 
-const PAGE_SIZE: usize = csr::CONFIG_SPIFLASH_PAGE_SIZE as usize;
+pub unsafe fn write(mut addr: usize, mut data: &[u8]) {
-const PAGE_MASK: usize = PAGE_SIZE - 1;
-
-pub fn write(mut addr: usize, mut data: &[u8]) {
     if addr & PAGE_MASK != 0 {
         let size = cmp::min((PAGE_SIZE - (addr & PAGE_MASK)) as usize, data.len());
         write_page(addr, &data[..size]);

artiq/firmware/runtime/Cargo.toml

@@ -19,6 +19,7 @@ log = { version = "0.3", default-features = false }
 alloc_list = { path = "../liballoc_list" }
 std_artiq = { path = "../libstd_artiq", features = ["alloc", "io_error_alloc"] }
 logger_artiq = { path = "../liblogger_artiq" }
+backtrace_artiq = { path = "../libbacktrace_artiq" }
 board = { path = "../libboard", features = ["uart_console"] }
 proto = { path = "../libproto", features = ["log"] }
 amp = { path = "../libamp" }
@@ -37,6 +38,6 @@ features = ["alloc"]
 
 [dependencies.smoltcp]
 git = "https://github.com/m-labs/smoltcp"
-rev = "6f5ae33"
+rev = "181083f"
 default-features = false
-features = ["alloc", "log"]
+features = ["alloc", "log", "proto-ipv4", "socket-tcp"]

artiq/firmware/runtime/Makefile

@@ -1,32 +1,30 @@
 include ../include/generated/variables.mak
 include $(MISOC_DIRECTORY)/software/common.mak
 
-LDFLAGS += -L../libbase
+CFLAGS += \
+	-I$(LIBUNWIND_DIRECTORY) \
+	-I$(LIBUNWIND_DIRECTORY)/../unwinder/include
 
-RUSTFLAGS += -Cpanic=abort
+LDFLAGS += -L../libbase \
+	-L../libunwind
 
-all: runtime.bin runtime.fbi
+RUSTFLAGS += -Cpanic=unwind
+
+all:: runtime.bin runtime.fbi
 
 .PHONY: $(RUSTOUT)/libruntime.a
 $(RUSTOUT)/libruntime.a:
 	$(cargo) --manifest-path $(RUNTIME_DIRECTORY)/Cargo.toml
 
 runtime.elf: $(RUSTOUT)/libruntime.a ksupport_data.o
-	$(LD) $(LDFLAGS) -T $(RUNTIME_DIRECTORY)/runtime.ld -o $@ $^
+	$(link) -T $(RUNTIME_DIRECTORY)/runtime.ld \
-	@chmod -x $@
+		-lunwind-bare
 
 ksupport_data.o: ../ksupport/ksupport.elf
 	$(LD) -r -b binary -o $@ $<
 
 %.bin: %.elf
-	$(OBJCOPY) -O binary $< $@
+	$(objcopy) -O binary
-	@chmod -x $@
 
 %.fbi: %.bin
-	@echo " MSCIMG  " $@ && $(PYTHON) -m misoc.tools.mkmscimg -f -o $@ $<
+	$(mscimg) -f
-
-clean:
-	$(RM) *.o runtime.elf runtime.bin runtime.fbi
-	$(RM) -rf cargo
-
-.PHONY: all clean

artiq/firmware/runtime/config.rs

@@ -1,192 +0,0 @@
-use core::str;
-use std::btree_map::BTreeMap;
-use byteorder::{ByteOrder, BigEndian};
-use board::{mem, csr, cache, spiflash};
-
-const ADDR: usize = mem::FLASH_BOOT_ADDRESS + 0x80000 /* max runtime size */;
-const SIZE: usize = csr::CONFIG_SPIFLASH_SECTOR_SIZE as usize;
-
-mod lock {
-    use core::slice;
-    use core::sync::atomic::{AtomicUsize, Ordering};
-
-    static LOCKED: AtomicUsize = AtomicUsize::new(0);
-
-    pub struct Lock;
-
-    impl Lock {
-        pub fn take() -> Result<Lock, ()> {
-            if LOCKED.swap(1, Ordering::SeqCst) != 0 {
-                Err(()) // already locked
-            } else {
-                Ok(Lock) // locked now
-            }
-        }
-
-        pub fn data(&self) -> &'static [u8] {
-            unsafe { slice::from_raw_parts(super::ADDR as *const u8, super::SIZE) }
-        }
-    }
-
-    impl Drop for Lock {
-        fn drop(&mut self) {
-            LOCKED.store(0, Ordering::SeqCst)
-        }
-    }
-}
-
-pub use self::lock::Lock;
-
-struct Iter<'a> {
-    data:   &'a [u8],
-    offset: usize
-}
-
-impl<'a> Iter<'a> {
-    fn new(data: &'a [u8]) -> Iter<'a> {
-        Iter { data: data, offset: 0 }
-    }
-}
-
-impl<'a> Iterator for Iter<'a> {
-    type Item = Result<(&'a [u8], &'a [u8]), ()>;
-
-    fn next(&mut self) -> Option<Self::Item> {
-        let data = &self.data[self.offset..];
-
-        if data.len() < 4 {
-            error!("offset {}: truncated record", self.offset);
-            return Some(Err(()))
-        }
-
-        let record_size = BigEndian::read_u32(data) as usize;
-        if record_size < 4 {
-            error!("offset {}: invalid record size", self.offset);
-            return Some(Err(()))
-        }
-        if record_size == !0 /* all ones; erased flash */ {
-            return None
-        }
-
-        let record_body = &data[4..record_size];
-        match record_body.iter().position(|&x| x == 0) {
-            None => {
-                error!("offset {}: missing separator", self.offset);
-                Some(Err(()))
-            }
-            Some(pos) => {
-                self.offset += record_size;
-
-                let (key, zero_and_value) = record_body.split_at(pos);
-                Some(Ok((key, &zero_and_value[1..])))
-            }
-        }
-    }
-}
-
-pub fn read<F: FnOnce(Result<&[u8], ()>) -> R, R>(key: &str, f: F) -> R {
-    f(Lock::take().and_then(|lock| {
-        let mut iter = Iter::new(lock.data());
-        let mut value = &[][..];
-        while let Some(result) = iter.next() {
-            let (record_key, record_value) = result?;
-            if key.as_bytes() == record_key {
-                // last write wins
-                value = record_value
-            }
-        }
-        Ok(value)
-    }))
-}
-
-pub fn read_str<F: FnOnce(Result<&str, ()>) -> R, R>(key: &str, f: F) -> R {
-    read(key, |result| {
-        f(result.and_then(|value| str::from_utf8(value).map_err(|_| ())))
-    })
-}
-
-fn append_at(mut offset: usize, key: &[u8], value: &[u8]) -> Result<usize, ()> {
-    let record_size = 4 + key.len() + 1 + value.len();
-    if offset + record_size > SIZE {
-        return Err(())
-    }
-
-    let mut record_size_bytes = [0u8; 4];
-    BigEndian::write_u32(&mut record_size_bytes[..], record_size as u32);
-
-    spiflash::write(ADDR + offset, &record_size_bytes[..]);
-    offset += record_size_bytes.len();
-
-    spiflash::write(ADDR + offset, key);
-    offset += key.len();
-
-    spiflash::write(ADDR + offset, &[0]);
-    offset += 1;
-
-    spiflash::write(ADDR + offset, value);
-    offset += value.len();
-
-    cache::flush_l2_cache();
-    Ok(offset)
-}
-
-fn compact() -> Result<(), ()> {
-    let lock = Lock::take()?;
-
-    let mut items = BTreeMap::new();
-    {
-        let mut iter = Iter::new(lock.data());
-        while let Some(result) = iter.next() {
-            let (key, value) = result?;
-            items.insert(key, value);
-        }
-    }
-
-    spiflash::erase_sector(ADDR);
-    cache::flush_l2_cache();
-
-    let mut offset = 0;
-    for (key, value) in items {
-        offset = append_at(offset, key, value)?;
-    }
-    Ok(())
-}
-
-fn append(key: &str, value: &[u8]) -> Result<(), ()> {
-    let lock = Lock::take()?;
-
-    let free_offset = {
-        let mut iter = Iter::new(lock.data());
-        while let Some(result) = iter.next() {
-            let _ = result?;
-        }
-        iter.offset
-    };
-
-    append_at(free_offset, key.as_bytes(), value)?;
-    Ok(())
-}
-
-pub fn write(key: &str, value: &[u8]) -> Result<(), ()> {
-    match append(key, value) {
-        Ok(()) => (),
-        Err(()) => {
-            compact()?;
-            append(key, value)?;
-        }
-    }
-    Ok(())
-}
-
-pub fn remove(key: &str) -> Result<(), ()> {
-    write(key, &[])
-}
-
-pub fn erase() -> Result<(), ()> {
-    let _lock = Lock::take()?;
-
-    spiflash::erase_sector(ADDR);
-    cache::flush_l2_cache();
-
-    Ok(())
-}

artiq/firmware/runtime/config_dummy.rs

@@ -1,19 +0,0 @@
-pub fn read<F: FnOnce(Result<&[u8], ()>) -> R, R>(_key: &str, f: F) -> R {
-    f(Err(()))
-}
-
-pub fn read_str<F: FnOnce(Result<&str, ()>) -> R, R>(_key: &str, f: F) -> R {
-    f(Err(()))
-}
-
-pub fn write(_key: &str, _value: &[u8]) -> Result<(), ()> {
-    Err(())
-}
-
-pub fn remove(_key: &str) -> Result<(), ()> {
-    Err(())
-}
-
-pub fn erase() -> Result<(), ()> {
-    Err(())
-}

artiq/firmware/runtime/ethmac.rs

@@ -1,88 +1,158 @@
-use core::slice;
+use core::{slice, fmt};
+use smoltcp::Result;
+use smoltcp::phy::{self, DeviceCapabilities, Device};
+
 use board::{csr, mem};
-use smoltcp::Error;
-use smoltcp::phy::{DeviceLimits, Device};
 
-const RX0_BASE: usize = mem::ETHMAC_BASE + 0x0000;
+const RX_SLOTS: usize = csr::ETHMAC_RX_SLOTS as usize;
-const RX1_BASE: usize = mem::ETHMAC_BASE + 0x0800;
+const TX_SLOTS: usize = csr::ETHMAC_TX_SLOTS as usize;
-const RX2_BASE: usize = mem::ETHMAC_BASE + 0x1000;
+const SLOT_SIZE: usize = csr::ETHMAC_SLOT_SIZE as usize;
-const RX3_BASE: usize = mem::ETHMAC_BASE + 0x1800;
-const TX0_BASE: usize = mem::ETHMAC_BASE + 0x2000;
-const TX1_BASE: usize = mem::ETHMAC_BASE + 0x2800;
-const TX2_BASE: usize = mem::ETHMAC_BASE + 0x3000;
-const TX3_BASE: usize = mem::ETHMAC_BASE + 0x3800;
 
-const RX_BUFFERS: [*mut u8; 4] = [RX0_BASE as *mut u8, RX1_BASE as *mut u8,
+fn next_rx_slot() -> Option<usize> {
-                                  RX2_BASE as *mut u8, RX3_BASE as *mut u8];
-const TX_BUFFERS: [*mut u8; 4] = [TX0_BASE as *mut u8, TX1_BASE as *mut u8,
-                                  TX2_BASE as *mut u8, TX3_BASE as *mut u8];
-
-pub struct EthernetDevice;
-
-impl Device for EthernetDevice {
-    type RxBuffer = RxBuffer;
-    type TxBuffer = TxBuffer;
-
-    fn limits(&self) -> DeviceLimits {
-        let mut limits = DeviceLimits::default();
-        limits.max_transmission_unit = 1514;
-        limits.max_burst_size = Some(RX_BUFFERS.len());
-        limits
-    }
-
-    fn receive(&mut self, _timestamp: u64) -> Result<Self::RxBuffer, Error> {
     unsafe {
-            if csr::ethmac::sram_writer_ev_pending_read() != 0 {
+        if csr::ethmac::sram_writer_ev_pending_read() == 0 {
-                let slot   = csr::ethmac::sram_writer_slot_read();
+            None
-                let length = csr::ethmac::sram_writer_length_read();
-                Ok(RxBuffer(slice::from_raw_parts(RX_BUFFERS[slot as usize],
-                                                  length as usize)))
         } else {
-                Err(Error::Exhausted)
+            Some(csr::ethmac::sram_writer_slot_read() as usize)
         }
     }
 }
 
-    fn transmit(&mut self, _timestamp: u64, length: usize) -> Result<Self::TxBuffer, Error> {
+fn next_tx_slot() -> Option<usize> {
     unsafe {
-            if csr::ethmac::sram_reader_ready_read() != 0 {
+        if csr::ethmac::sram_reader_ready_read() == 0 {
-                let slot  = csr::ethmac::sram_reader_slot_read();
+            None
-                let slot  = (slot + 1) % (TX_BUFFERS.len() as u8);
+        } else {
-                csr::ethmac::sram_reader_slot_write(slot);
+            Some((csr::ethmac::sram_reader_slot_read() as usize + 1) % TX_SLOTS)
+        }
+    }
+}
+
+fn rx_buffer(slot: usize) -> *const u8 {
+    debug_assert!(slot < RX_SLOTS);
+    (mem::ETHMAC_BASE + SLOT_SIZE * slot) as _
+}
+
+fn tx_buffer(slot: usize) -> *mut u8 {
+    debug_assert!(slot < TX_SLOTS);
+    (mem::ETHMAC_BASE + SLOT_SIZE * (RX_SLOTS + slot)) as _
+}
+
+pub struct EthernetDevice(());
+
+impl EthernetDevice {
+    pub unsafe fn new() -> EthernetDevice {
+        EthernetDevice(())
+    }
+}
+
+impl<'a> Device<'a> for EthernetDevice {
+    type RxToken = EthernetRxSlot;
+    type TxToken = EthernetTxSlot;
+
+    fn capabilities(&self) -> DeviceCapabilities {
+        let mut caps = DeviceCapabilities::default();
+        caps.max_transmission_unit = 1514;
+        caps.max_burst_size = Some(RX_SLOTS);
+        caps
+    }
+
+    fn receive(&mut self) -> Option<(Self::RxToken, Self::TxToken)> {
+        if let (Some(rx_slot), Some(tx_slot)) = (next_rx_slot(), next_tx_slot()) {
+            Some((EthernetRxSlot(rx_slot), EthernetTxSlot(tx_slot)))
+        } else {
+            None
+        }
+    }
+
+    fn transmit(&mut self) -> Option<Self::TxToken> {
+        if let Some(tx_slot) = next_tx_slot() {
+            Some(EthernetTxSlot(tx_slot))
+        } else {
+            None
+        }
+    }
+}
+
+pub struct EthernetRxSlot(usize);
+
+impl phy::RxToken for EthernetRxSlot {
+    fn consume<R, F>(self, _timestamp: u64, f: F) -> Result<R>
+        where F: FnOnce(&[u8]) -> Result<R>
+    {
+        unsafe {
+            let length = csr::ethmac::sram_writer_length_read() as usize;
+            let result = f(slice::from_raw_parts(rx_buffer(self.0), length));
+            csr::ethmac::sram_writer_ev_pending_write(1);
+            result
+        }
+    }
+}
+
+pub struct EthernetTxSlot(usize);
+
+impl phy::TxToken for EthernetTxSlot {
+    fn consume<R, F>(self, _timestamp: u64, length: usize, f: F) -> Result<R>
+        where F: FnOnce(&mut [u8]) -> Result<R>
+    {
+        debug_assert!(length < SLOT_SIZE);
+
+        unsafe {
+            let result = f(slice::from_raw_parts_mut(tx_buffer(self.0), length))?;
+            csr::ethmac::sram_reader_slot_write(self.0 as u8);
             csr::ethmac::sram_reader_length_write(length as u16);
-                Ok(TxBuffer(slice::from_raw_parts_mut(TX_BUFFERS[slot as usize],
+            csr::ethmac::sram_reader_start_write(1);
-                                                      length as usize)))
+            Ok(result)
+        }
+    }
+}
+
+#[derive(Debug, Clone, PartialEq, Eq, Default)]
+pub struct EthernetStatistics {
+    rx_preamble_errors: u32,
+    rx_crc_errors:      u32,
+    rx_dropped:         u32,
+}
+
+impl EthernetStatistics {
+    pub fn new() -> Self {
+        unsafe {
+            EthernetStatistics {
+                rx_preamble_errors: csr::ethmac::preamble_errors_read(),
+                rx_crc_errors:      csr::ethmac::crc_errors_read(),
+                rx_dropped:         csr::ethmac::sram_writer_errors_read(),
+            }
+        }
+    }
+
+    pub fn update(&mut self) -> Option<Self> {
+        let old = self.clone();
+        *self = Self::new();
+
+        let diff = EthernetStatistics {
+            rx_preamble_errors: self.rx_preamble_errors.wrapping_sub(old.rx_preamble_errors),
+            rx_crc_errors:      self.rx_crc_errors.wrapping_sub(old.rx_crc_errors),
+            rx_dropped:         self.rx_dropped.wrapping_sub(old.rx_dropped),
+        };
+        if diff == EthernetStatistics::default() {
+            None
         } else {
-                Err(Error::Exhausted)
+            Some(diff)
-            }
         }
     }
 }
 
-pub struct RxBuffer(&'static [u8]);
+impl fmt::Display for EthernetStatistics {
-
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-impl AsRef<[u8]> for RxBuffer {
+        if self.rx_preamble_errors > 0 {
-    fn as_ref(&self) -> &[u8] { self.0 }
+            write!(f, " rx preamble errors: {}", self.rx_preamble_errors)?
         }
-
+        if self.rx_crc_errors > 0 {
-impl Drop for RxBuffer {
+            write!(f, " rx crc errors: {}", self.rx_crc_errors)?
-    fn drop(&mut self) {
+        }
-        unsafe { csr::ethmac::sram_writer_ev_pending_write(1) }
+        if self.rx_dropped > 0 {
-    }
+            write!(f, " rx dropped: {}", self.rx_dropped)?
-}
+        }
-
+        Ok(())
-pub struct TxBuffer(&'static mut [u8]);
-
-impl AsRef<[u8]> for TxBuffer {
-    fn as_ref(&self) -> &[u8] { self.0 }
-}
-
-impl AsMut<[u8]> for TxBuffer {
-    fn as_mut(&mut self) -> &mut [u8] { self.0 }
-}
-
-impl Drop for TxBuffer {
-    fn drop(&mut self) {
-        unsafe { csr::ethmac::sram_reader_start_write(1) }
     }
 }

artiq/firmware/runtime/lib.rs

@@ -14,6 +14,7 @@ extern crate alloc_list;
 #[macro_use]
 extern crate std_artiq as std;
 extern crate logger_artiq;
+extern crate backtrace_artiq;
 #[macro_use]
 extern crate board;
 extern crate proto;
@@ -21,24 +22,12 @@ extern crate amp;
 #[cfg(has_drtio)]
 extern crate drtioaux;
 
-use std::boxed::Box;
+use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
-use smoltcp::wire::{EthernetAddress, IpAddress};
+
+use board::config;
 use proto::{mgmt_proto, analyzer_proto, moninj_proto, rpc_proto, session_proto, kernel_proto};
 use amp::{mailbox, rpc_queue};
 
-macro_rules! borrow_mut {
-    ($x:expr) => ({
-        match $x.try_borrow_mut() {
-            Ok(x) => x,
-            Err(_) => panic!("cannot borrow mutably at {}:{}", file!(), line!())
-        }
-    })
-}
-
-#[cfg(has_spiflash)]
-mod config;
-#[cfg(not(has_spiflash))]
-#[path="config_dummy.rs"] mod config;
 mod ethmac;
 mod rtio_mgt;
 
@@ -95,7 +84,7 @@ fn startup() {
 
     let protocol_addr;
     match config::read_str("ip", |r| r?.parse()) {
-        Err(()) | Ok(IpAddress::Unspecified) => {
+        Err(()) => {
             protocol_addr = IpAddress::v4(192, 168, 1, 50);
             info!("using default IP address {}", protocol_addr);
         }
@@ -109,15 +98,20 @@ fn startup() {
     //         where U: smoltcp::wire::pretty_print::PrettyPrint {
     //     let seconds = timestamp / 1000;
     //     let micros  = timestamp % 1000 * 1000;
-    //     print!("\x1b[37m[{:6}.{:06}s]\n{}\x1b[0m", seconds, micros, printer)
+    //     print!("\x1b[37m[{:6}.{:06}s]\n{}\x1b[0m\n", seconds, micros, printer)
     // }
 
-    let net_device = ethmac::EthernetDevice;
+    let net_device = unsafe { ethmac::EthernetDevice::new() };
     // let net_device = smoltcp::phy::EthernetTracer::new(net_device, _net_trace_writer);
-    let arp_cache  = smoltcp::iface::SliceArpCache::new([Default::default(); 8]);
+    let mut neighbor_cache_storage = [None; 8];
-    let mut interface  = smoltcp::iface::EthernetInterface::new(
+    let neighbor_cache =
-        Box::new(net_device), Box::new(arp_cache) as Box<smoltcp::iface::ArpCache>,
+        smoltcp::iface::NeighborCache::new(&mut neighbor_cache_storage[..]);
-        hardware_addr, [protocol_addr]);
+    let mut interface  =
+        smoltcp::iface::EthernetInterfaceBuilder::new(net_device)
+                       .neighbor_cache(neighbor_cache)
+                       .ethernet_addr(hardware_addr)
+                       .ip_addrs([IpCidr::new(protocol_addr, 0)])
+                       .finalize();
 
     let mut scheduler = sched::Scheduler::new();
     let io = scheduler.io();
@@ -154,14 +148,19 @@ fn startup() {
     loop {
         scheduler.run();
 
-        match interface.poll(&mut *borrow_mut!(scheduler.sockets()),
+        {
-                             board::clock::get_ms()) {
+            let sockets = &mut *scheduler.sockets().borrow_mut();
-            Ok(_poll_at) => (),
+            loop {
+                match interface.poll(sockets, board::clock::get_ms()) {
+                    Ok(true) => (),
+                    Ok(false) => break,
                     Err(smoltcp::Error::Unrecognized) => (),
                     Err(err) => warn!("network error: {}", err)
                 }
             }
         }
+    }
+}
 
 #[global_allocator]
 static mut ALLOC: alloc_list::ListAlloc = alloc_list::EMPTY;
@@ -189,7 +188,9 @@ pub extern fn exception_handler(vect: u32, _regs: *const u32, pc: u32, ea: u32)
 
 #[no_mangle]
 pub extern fn abort() {
-    panic!("aborted")
+    println!("aborted");
+
+    loop {}
 }
 
 #[no_mangle]
@@ -197,6 +198,12 @@ pub extern fn abort() {
 pub extern fn panic_fmt(args: core::fmt::Arguments, file: &'static str, line: u32) -> ! {
     println!("panic at {}:{}: {}", file, line, args);
 
+    println!("backtrace for software version {}:",
+             include_str!(concat!(env!("OUT_DIR"), "/git-describe")));
+    let _ = backtrace_artiq::backtrace(|ip| {
+        println!("{:#08x}", ip);
+    });
+
     if config::read_str("panic_reboot", |r| r == Ok("1")) {
         println!("rebooting...");
         unsafe { board::boot::reboot() }
@@ -206,11 +213,3 @@ pub extern fn panic_fmt(args: core::fmt::Arguments, file: &'static str, line: u3
         loop {}
     }
 }
-
-// Allow linking with crates that are built as -Cpanic=unwind even if we use -Cpanic=abort.
-// This is never called.
-#[allow(non_snake_case)]
-#[no_mangle]
-pub extern fn _Unwind_Resume() -> ! {
-    loop {}
-}

artiq/firmware/runtime/rtio_mgt.rs

@@ -1,5 +1,4 @@
-use config;
+use board::{csr, config};
-use board::csr;
 use sched::Io;
 
 #[cfg(has_rtio_crg)]
@@ -219,16 +218,25 @@ pub fn startup(io: &Io) {
 
     let clk = config::read("startup_clock", |result| {
         match result {
-            Ok(b"i") => RtioClock::Internal,
+            Ok(b"i") => {
-            Ok(b"e") => RtioClock::External,
+                info!("using internal startup RTIO clock");
-            _ => {
+                RtioClock::Internal
-                error!("unrecognized startup_clock configuration entry");
+            },
+            Ok(b"e") => {
+                info!("using external startup RTIO clock");
+                RtioClock::External
+            },
+            Err(()) => {
+                info!("using internal startup RTIO clock (by default)");
+                RtioClock::Internal
+            },
+            Ok(_) => {
+                error!("unrecognized startup_clock configuration entry, using internal RTIO clock");
                 RtioClock::Internal
             }
         }
     });
 
-    info!("startup RTIO clock: {:?}", clk);
     if !crg::switch_clock(clk as u8) {
         error!("startup RTIO clock failed");
         warn!("this may cause the system initialization to fail");

artiq/firmware/runtime/runtime.ld

@@ -20,6 +20,21 @@ SECTIONS
         _etext = .;
     } > runtime
 
+    .eh_frame :
+    {
+        __eh_frame_start = .;
+        KEEP(*(.eh_frame))
+        __eh_frame_end = .;
+    } > runtime
+
+    .eh_frame_hdr :
+    {
+        KEEP(*(.eh_frame_hdr))
+    } > runtime
+
+    __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0;
+    __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0;
+
     /* https://sourceware.org/bugzilla/show_bug.cgi?id=20475 */
     .got :
     {
@@ -79,10 +94,4 @@ SECTIONS
         . = ORIGIN(runtime) + LENGTH(runtime);
         _eheap = .;
     } > runtime
-
-    /DISCARD/ :
-    {
-        *(.eh_frame)
-        *(.gcc_except_table)
-    }
 }

artiq/firmware/runtime/sched.rs

@@ -1,19 +1,20 @@
 #![allow(dead_code)]
 
 use std::mem;
-use std::cell::{Cell, RefCell, RefMut};
+use std::cell::{Cell, RefCell};
 use std::vec::Vec;
 use std::io::{Read, Write, Result, Error, ErrorKind};
 use fringe::OwnedStack;
 use fringe::generator::{Generator, Yielder, State as GeneratorState};
 
 use smoltcp::wire::IpEndpoint;
-use smoltcp::socket::{AsSocket, SocketHandle};
+use smoltcp::socket::{SocketHandle, SocketRef};
-type SocketSet = ::smoltcp::socket::SocketSet<'static, 'static, 'static>;
 
 use board;
 use urc::Urc;
 
+type SocketSet = ::smoltcp::socket::SocketSet<'static, 'static, 'static>;
+
 #[derive(Debug)]
 struct WaitRequest {
     event:   Option<*const (Fn() -> bool + 'static)>,
@@ -123,7 +124,7 @@ impl Scheduler {
     pub fn run(&mut self) {
         self.sockets.borrow_mut().prune();
 
-        self.threads.append(&mut *borrow_mut!(self.spawned));
+        self.threads.append(&mut *self.spawned.borrow_mut());
         if self.threads.len() == 0 { return }
 
         let now = board::clock::get_ms();
@@ -132,7 +133,7 @@ impl Scheduler {
             self.run_idx = (self.run_idx + 1) % self.threads.len();
 
             let result = {
-                let mut thread = borrow_mut!(self.threads[self.run_idx].0);
+                let mut thread = self.threads[self.run_idx].0.borrow_mut();
                 match thread.waiting_for {
                     _ if thread.interrupted => {
                         thread.interrupted = false;
@@ -163,7 +164,7 @@ impl Scheduler {
                 },
                 Some(wait_request) => {
                     // The thread has suspended itself.
-                    let mut thread = borrow_mut!(self.threads[self.run_idx].0);
+                    let mut thread = self.threads[self.run_idx].0.borrow_mut();
                     thread.waiting_for = wait_request
                 }
             }
@@ -188,7 +189,7 @@ impl<'a> Io<'a> {
     pub fn spawn<F>(&self, stack_size: usize, f: F) -> ThreadHandle
             where F: 'static + FnOnce(Io) + Send {
         let handle = unsafe { Thread::new(self, stack_size, f) };
-        borrow_mut!(self.spawned).push(handle.clone());
+        self.spawned.borrow_mut().push(handle.clone());
         handle
     }
 
@@ -240,87 +241,18 @@ macro_rules! until {
     ($socket:expr, $ty:ty, |$var:ident| $cond:expr) => ({
         let (sockets, handle) = ($socket.io.sockets.clone(), $socket.handle);
         $socket.io.until(move || {
-            let mut sockets = borrow_mut!(sockets);
+            let mut sockets = sockets.borrow_mut();
-            let $var: &mut $ty = sockets.get_mut(handle).as_socket();
+            let $var = sockets.get::<$ty>(handle);
             $cond
         })
     })
 }
 
+
 use ::smoltcp::Error as ErrorLower;
 // https://github.com/rust-lang/rust/issues/44057
 // type ErrorLower = ::smoltcp::Error;
 
-type UdpPacketBuffer = ::smoltcp::socket::UdpPacketBuffer<'static>;
-type UdpSocketBuffer = ::smoltcp::socket::UdpSocketBuffer<'static, 'static>;
-type UdpSocketLower  = ::smoltcp::socket::UdpSocket<'static, 'static>;
-
-pub struct UdpSocket<'a> {
-    io:     &'a Io<'a>,
-    handle: SocketHandle
-}
-
-impl<'a> UdpSocket<'a> {
-    pub fn new(io: &'a Io<'a>, buffer_depth: usize, buffer_width: usize) -> UdpSocket<'a> {
-        let mut rx_buffer = vec![];
-        let mut tx_buffer = vec![];
-        for _ in 0..buffer_depth {
-            rx_buffer.push(UdpPacketBuffer::new(vec![0; buffer_width]));
-            tx_buffer.push(UdpPacketBuffer::new(vec![0; buffer_width]));
-        }
-        let handle = borrow_mut!(io.sockets)
-                        .add(UdpSocketLower::new(
-                                UdpSocketBuffer::new(rx_buffer),
-                                UdpSocketBuffer::new(tx_buffer)));
-        UdpSocket {
-            io:     io,
-            handle: handle
-        }
-    }
-
-    fn as_lower<'b>(&'b self) -> RefMut<'b, UdpSocketLower> {
-        RefMut::map(borrow_mut!(self.io.sockets),
-                    |sockets| sockets.get_mut(self.handle).as_socket())
-    }
-
-    pub fn bind<T: Into<IpEndpoint>>(&self, endpoint: T) -> Result<()> {
-        match self.as_lower().bind(endpoint) {
-            Ok(()) => Ok(()),
-            Err(ErrorLower::Illegal) =>
-                Err(Error::new(ErrorKind::Other, "already listening")),
-            Err(ErrorLower::Unaddressable) =>
-                Err(Error::new(ErrorKind::AddrNotAvailable, "port cannot be zero")),
-            _ => unreachable!()
-        }
-    }
-
-    pub fn recv_from(&self, buf: &mut [u8]) -> Result<(usize, IpEndpoint)> {
-        until!(self, UdpSocketLower, |s| s.can_recv())?;
-        match self.as_lower().recv_slice(buf) {
-            Ok(result) => Ok(result),
-            Err(_) => unreachable!()
-        }
-    }
-
-    pub fn send_to(&self, buf: &[u8], addr: IpEndpoint) -> Result<()> {
-        until!(self, UdpSocketLower, |s| s.can_send())?;
-        match self.as_lower().send_slice(buf, addr) {
-            Ok(()) => Ok(()),
-            Err(ErrorLower::Unaddressable) =>
-                Err(Error::new(ErrorKind::AddrNotAvailable, "unaddressable destination")),
-            Err(ErrorLower::Truncated) =>
-                Err(Error::new(ErrorKind::Other, "packet does not fit in buffer")),
-            Err(_) => unreachable!()
-        }
-    }
-}
-
-impl<'a> Drop for UdpSocket<'a> {
-    fn drop(&mut self) {
-        borrow_mut!(self.io.sockets).release(self.handle)
-    }
-}
-
 type TcpSocketBuffer = ::smoltcp::socket::TcpSocketBuffer<'static>;
 type TcpSocketLower  = ::smoltcp::socket::TcpSocket<'static>;
 
@@ -337,7 +269,8 @@ impl<'a> TcpListener<'a> {
     fn new_lower(io: &'a Io<'a>, buffer_size: usize) -> SocketHandle {
         let rx_buffer = vec![0; buffer_size];
         let tx_buffer = vec![0; buffer_size];
-        borrow_mut!(io.sockets)
+        io.sockets
+            .borrow_mut()
             .add(TcpSocketLower::new(
                 TcpSocketBuffer::new(rx_buffer),
                 TcpSocketBuffer::new(tx_buffer)))
@@ -352,35 +285,41 @@ impl<'a> TcpListener<'a> {
         }
     }
 
-    fn as_lower<'b>(&'b self) -> RefMut<'b, TcpSocketLower> {
+    fn with_lower<F, R>(&self, f: F) -> R
-        RefMut::map(borrow_mut!(self.io.sockets),
+            where F: FnOnce(SocketRef<TcpSocketLower>) -> R {
-                    |sockets| sockets.get_mut(self.handle.get()).as_socket())
+        let mut sockets = self.io.sockets.borrow_mut();
+        let result = f(sockets.get(self.handle.get()));
+        result
     }
 
     pub fn is_open(&self) -> bool {
-        self.as_lower().is_open()
+        self.with_lower(|s| s.is_open())
     }
 
     pub fn can_accept(&self) -> bool {
-        self.as_lower().is_active()
+        self.with_lower(|s| s.is_active())
     }
 
     pub fn local_endpoint(&self) -> IpEndpoint {
-        self.as_lower().local_endpoint()
+        self.with_lower(|s| s.local_endpoint())
     }
 
     pub fn listen<T: Into<IpEndpoint>>(&self, endpoint: T) -> Result<()> {
         let endpoint = endpoint.into();
-        match self.as_lower().listen(endpoint) {
+        self.with_lower(|mut s| s.listen(endpoint))
-            Ok(()) => Ok(()),
+            .map(|()| {
-            Err(ErrorLower::Illegal) =>
-                Err(Error::new(ErrorKind::Other, "already listening")),
-            Err(ErrorLower::Unaddressable) =>
-                Err(Error::new(ErrorKind::InvalidInput, "port cannot be zero")),
-            _ => unreachable!()
-        }?;
                 self.endpoint.set(endpoint);
-        Ok(())
+                ()
+            })
+            .map_err(|err| {
+                match err {
+                    ErrorLower::Illegal =>
+                        Error::new(ErrorKind::Other, "already listening"),
+                    ErrorLower::Unaddressable =>
+                        Error::new(ErrorKind::InvalidInput, "port cannot be zero"),
+                    _ => unreachable!()
+                }
+            })
     }
 
     pub fn accept(&self) -> Result<TcpStream<'a>> {
@@ -389,8 +328,8 @@ impl<'a> TcpListener<'a> {
         // that still counts as accepting even though nothing may be sent.
         let (sockets, handle) = (self.io.sockets.clone(), self.handle.get());
         self.io.until(move || {
-            let mut sockets = borrow_mut!(sockets);
+            let mut sockets = sockets.borrow_mut();
-            let socket: &mut TcpSocketLower = sockets.get_mut(handle).as_socket();
+            let socket = sockets.get::<TcpSocketLower>(handle);
             socket.may_send() || socket.may_recv()
         })?;
 
@@ -407,14 +346,14 @@ impl<'a> TcpListener<'a> {
     }
 
     pub fn close(&self) {
-        self.as_lower().close()
+        self.with_lower(|mut s| s.close())
     }
 }
 
 impl<'a> Drop for TcpListener<'a> {
     fn drop(&mut self) {
-        self.as_lower().close();
+        self.with_lower(|mut s| s.close());
-        borrow_mut!(self.io.sockets).release(self.handle.get())
+        self.io.sockets.borrow_mut().release(self.handle.get())
     }
 }
 
@@ -437,57 +376,59 @@ impl<'a> TcpStream<'a> {
         }
     }
 
-    fn as_lower<'b>(&'b self) -> RefMut<'b, TcpSocketLower> {
+    fn with_lower<F, R>(&self, f: F) -> R
-        RefMut::map(borrow_mut!(self.io.sockets),
+            where F: FnOnce(SocketRef<TcpSocketLower>) -> R {
-                    |sockets| sockets.get_mut(self.handle).as_socket())
+        let mut sockets = self.io.sockets.borrow_mut();
+        let result = f(sockets.get(self.handle));
+        result
     }
 
     pub fn is_open(&self) -> bool {
-        self.as_lower().is_open()
+        self.with_lower(|s| s.is_open())
     }
 
     pub fn may_send(&self) -> bool {
-        self.as_lower().may_send()
+        self.with_lower(|s| s.may_send())
     }
 
     pub fn may_recv(&self) -> bool {
-        self.as_lower().may_recv()
+        self.with_lower(|s| s.may_recv())
     }
 
     pub fn can_send(&self) -> bool {
-        self.as_lower().can_send()
+        self.with_lower(|s| s.can_send())
     }
 
     pub fn can_recv(&self) -> bool {
-        self.as_lower().can_recv()
+        self.with_lower(|s| s.can_recv())
     }
 
     pub fn local_endpoint(&self) -> IpEndpoint {
-        self.as_lower().local_endpoint()
+        self.with_lower(|s| s.local_endpoint())
     }
 
     pub fn remote_endpoint(&self) -> IpEndpoint {
-        self.as_lower().remote_endpoint()
+        self.with_lower(|s| s.remote_endpoint())
     }
 
     pub fn timeout(&self) -> Option<u64> {
-        self.as_lower().timeout()
+        self.with_lower(|s| s.timeout())
     }
 
     pub fn set_timeout(&self, value: Option<u64>) {
-        self.as_lower().set_timeout(value)
+        self.with_lower(|mut s| s.set_timeout(value))
     }
 
     pub fn keep_alive(&self) -> Option<u64> {
-        self.as_lower().keep_alive()
+        self.with_lower(|s| s.keep_alive())
     }
 
     pub fn set_keep_alive(&self, value: Option<u64>) {
-        self.as_lower().set_keep_alive(value)
+        self.with_lower(|mut s| s.set_keep_alive(value))
     }
 
     pub fn close(&self) -> Result<()> {
-        self.as_lower().close();
+        self.with_lower(|mut s| s.close());
         until!(self, TcpSocketLower, |s| !s.is_open())?;
         // right now the socket may be in TIME-WAIT state. if we don't give it a chance to send
         // a packet, and the user code executes a loop { s.listen(); s.read(); s.close(); }
@@ -499,12 +440,12 @@ impl<'a> TcpStream<'a> {
 impl<'a> Read for TcpStream<'a> {
     fn read(&mut self, buf: &mut [u8]) -> Result<usize> {
         // Only borrow the underlying socket for the span of the next statement.
-        let result = self.as_lower().recv_slice(buf);
+        let result = self.with_lower(|mut s| s.recv_slice(buf));
         match result {
             // Slow path: we need to block until buffer is non-empty.
             Ok(0) => {
                 until!(self, TcpSocketLower, |s| s.can_recv() || !s.may_recv())?;
-                match self.as_lower().recv_slice(buf) {
+                match self.with_lower(|mut s| s.recv_slice(buf)) {
                     Ok(length) => Ok(length),
                     Err(ErrorLower::Illegal) => Ok(0),
                     _ => unreachable!()
@@ -523,12 +464,12 @@ impl<'a> Read for TcpStream<'a> {
 impl<'a> Write for TcpStream<'a> {
     fn write(&mut self, buf: &[u8]) -> Result<usize> {
         // Only borrow the underlying socket for the span of the next statement.
-        let result = self.as_lower().send_slice(buf);
+        let result = self.with_lower(|mut s| s.send_slice(buf));
         match result {
             // Slow path: we need to block until buffer is non-full.
             Ok(0) => {
                 until!(self, TcpSocketLower, |s| s.can_send() || !s.may_send())?;
-                match self.as_lower().send_slice(buf) {
+                match self.with_lower(|mut s| s.send_slice(buf)) {
                     Ok(length) => Ok(length),
                     Err(ErrorLower::Illegal) => Ok(0),
                     _ => unreachable!()
@@ -545,7 +486,7 @@ impl<'a> Write for TcpStream<'a> {
 
     fn flush(&mut self) -> Result<()> {
         until!(self, TcpSocketLower, |s|  s.send_queue() == 0 || !s.may_send())?;
-        if self.as_lower().send_queue() == 0 {
+        if self.with_lower(|s| s.send_queue()) == 0 {
             Ok(())
         } else {
             Err(Error::new(ErrorKind::ConnectionAborted, "connection aborted"))
@@ -555,7 +496,7 @@ impl<'a> Write for TcpStream<'a> {
 
 impl<'a> Drop for TcpStream<'a> {
     fn drop(&mut self) {
-        self.as_lower().close();
+        self.with_lower(|mut s| s.close());
-        borrow_mut!(self.io.sockets).release(self.handle)
+        self.io.sockets.borrow_mut().release(self.handle)
     }
 }

artiq/firmware/runtime/session.rs

@@ -3,14 +3,14 @@ use std::{mem, str};
 use std::cell::{Cell, RefCell};
 use std::io::{self, Read, Write};
 use std::error::Error;
-use {config, rtio_mgt, mailbox, rpc_queue, kernel};
+use {rtio_mgt, mailbox, rpc_queue, kernel};
 use cache::Cache;
 use rtio_dma::Manager as DmaManager;
 use urc::Urc;
 use sched::{ThreadHandle, Io};
 use sched::{TcpListener, TcpStream};
 use byteorder::{ByteOrder, NetworkEndian};
-use board;
+use board::{self, config};
 
 use rpc_proto as rpc;
 use session_proto as host;
@@ -615,7 +615,7 @@ pub fn thread(io: Io) {
     {
         let congress = congress.clone();
         respawn(&io, &mut kernel_thread, move |io| {
-            let mut congress = borrow_mut!(congress);
+            let mut congress = congress.borrow_mut();
             info!("running startup kernel");
             match flash_kernel_worker(&io, &mut congress, "startup_kernel") {
                 Ok(()) => info!("startup kernel finished"),
@@ -650,7 +650,7 @@ pub fn thread(io: Io) {
             let congress = congress.clone();
             let stream = stream.into_handle();
             respawn(&io, &mut kernel_thread, move |io| {
-                let mut congress = borrow_mut!(congress);
+                let mut congress = congress.borrow_mut();
                 let mut stream = TcpStream::from_handle(&io, stream);
                 match host_kernel_worker(&io, &mut stream, &mut *congress) {
                     Ok(()) => (),
@@ -673,7 +673,7 @@ pub fn thread(io: Io) {
 
             let congress = congress.clone();
             respawn(&io, &mut kernel_thread, move |io| {
-                let mut congress = borrow_mut!(congress);
+                let mut congress = congress.borrow_mut();
                 match flash_kernel_worker(&io, &mut *congress, "idle_kernel") {
                     Ok(()) =>
                         info!("idle kernel finished, standing by"),

artiq/firmware/satman/Makefile

@@ -5,25 +5,17 @@ LDFLAGS += -L../libbase
 
 RUSTFLAGS += -Cpanic=abort
 
-all: satman.bin satman.fbi
+all:: satman.bin satman.fbi
 
 .PHONY: $(RUSTOUT)/libsatman.a
 $(RUSTOUT)/libsatman.a:
 	$(cargo) --manifest-path $(SATMAN_DIRECTORY)/Cargo.toml
 
 satman.elf: $(RUSTOUT)/libsatman.a
-	$(LD) $(LDFLAGS) -T $(SATMAN_DIRECTORY)/satman.ld -o $@ $^
+	$(link) -T $(SATMAN_DIRECTORY)/satman.ld
-	@chmod -x $@
 
 %.bin: %.elf
-	$(OBJCOPY) -O binary $< $@
+	$(objcopy) -O binary
-	@chmod -x $@
 
 %.fbi: %.bin
-	@echo " MSCIMG  " $@ && $(PYTHON) -m misoc.tools.mkmscimg -f -o $@ $<
+	$(mscimg) -f
-
-clean:
-	$(RM) satman.elf satman.bin satman.fbi
-	$(RM) -rf cargo
-
-.PHONY: all clean

artiq/frontend/artiq_flash.py

@@ -51,6 +51,10 @@ Prerequisites:
                         help="target adapter, default: %(default)s")
     parser.add_argument("--target-file", default=None,
                         help="use alternative OpenOCD target file")
+    parser.add_argument("-I", "--preinit-command", default=[], action="append",
+                        help="add a pre-initialization OpenOCD command. "
+                             "Useful for selecting a development board "
+                             "when several are connected.")
     parser.add_argument("-f", "--storage", help="write file to storage area")
     parser.add_argument("-d", "--dir", help="look for files in this directory")
     parser.add_argument("action", metavar="ACTION", nargs="*",
@@ -69,8 +73,8 @@ def main():
             "start": "xc7_program xc7.tap",
             "gateware": 0x000000,
             "bios": 0xaf0000,
-            "runtime": 0xb00000,
+            "storage": 0xb30000,
-            "storage": 0xb80000,
+            "runtime": 0xb40000,
         },
     }[opts.target]
 
@@ -84,6 +88,7 @@ def main():
     conv = False
 
     prog = []
+    prog.extend(opts.preinit_command)
     prog.append("init")
     for action in opts.action:
         if action == "proxy":

artiq/frontend/artiq_influxdb.py

@@ -94,6 +94,7 @@ class DBWriter(TaskObject):
                            "too many pending updates", k)
 
     async def _do(self):
+        async with aiohttp.ClientSession() as session:
             while True:
                 k, v, t = await self._queue.get()
                 url = self.base_url + "/write"
@@ -102,8 +103,7 @@ class DBWriter(TaskObject):
                 data = "{},dataset={} {} {}".format(
                     self.table, k, format_influxdb(v), round(t*1e3))
                 try:
-                response = await aiohttp.request(
+                    response = await session.post(url, params=params, data=data)
-                    "POST", url, params=params, data=data)
                 except:
                     logger.warning("got exception trying to update '%s'",
                                    k, exc_info=True)

artiq/frontend/artiq_pcap.py

@@ -4,8 +4,8 @@
 #  * tcpdump has CAP_NET_RAW capabilities set
 #    use # setcap cap_net_raw+eip /usr/sbin/tcpdump
 
-import argparse
 import os
+import argparse
 import subprocess
 
 from artiq.tools import verbosity_args, init_logger, logger, SSHClient
@@ -49,7 +49,6 @@ def main():
         subprocess.check_call(args.command)
     except subprocess.CalledProcessError:
         logger.error("Command failed")
-        sys.exit(1)
 
     tcpdump.close()
     sftp.get("{tmp}/trace.pcap".format(tmp=client.tmp),

artiq/gateware/spi.py

@@ -208,9 +208,11 @@ class SPIMaster(Module):
 
         clk_t = TSTriple()
         self.specials += clk_t.get_tristate(pads.clk)
-        self.comb += [
+        self.comb += clk_t.oe.eq(~config.offline),
-            clk_t.oe.eq(~config.offline),
+        self.sync += [
-            clk_t.o.eq((spi.cg.clk & spi.cs) ^ config.clk_polarity),
+            If(spi.cg.ce & spi.cg.edge,
+                clk_t.o.eq((~spi.cg.clk & spi.cs_next) ^ config.clk_polarity)
+            )
         ]
 
         mosi_t = TSTriple()

artiq/gateware/targets/kc705_phaser.py

@@ -157,7 +157,6 @@ class Phaser(MiniSoC, AMPSoC):
         "rtio":          0x20000000,
         "rtio_dma":      0x30000000,
         "mailbox":       0x70000000,
-        "ad9154":        0x50000000,
     }
     mem_map.update(MiniSoC.mem_map)
 

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+       d="m 318.27705,360.24104 c 2.295,-0.315 4.95,-2.115 4.95,-5.895 0,-3.96 -2.88,-6.57 -8.775,-6.57 -4.635,0 -8.685,1.62 -9.675,6.57 l 4.275,1.17 c 0.27,-1.98 1.395,-3.87 4.95,-3.87 2.925,0 4.635,1.305 4.635,3.51 0,2.295 -1.755,3.555 -4.77,3.555 h -2.475 v 3.42 h 2.655 c 2.925,0 4.86,1.215 4.86,3.69 0,2.295 -1.62,4.095 -4.86,4.095 -3.06,0 -5.04,-1.53 -5.625,-4.275 l -4.14,1.17 c 0.9,4.59 4.68,7.155 9.9,7.155 5.715,0 9.315,-3.015 9.315,-7.515 0,-3.69 -2.385,-5.76 -5.22,-6.03 z"
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+       id="path3376"
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+       inkscape:connector-curvature="0" /></g></svg>
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-       id="path3380" /></g></svg>

artiq/gui/scanwidget.py

@@ -223,7 +223,7 @@ class ScanWidget(QtWidgets.QWidget):
             self._zoom(self.zoomFactor**y, ev.x())
 
     def resizeEvent(self, ev):
-        if not ev.oldSize().isValid():
+        if not ev.oldSize().isValid() or not ev.oldSize().width():
             self.viewRange()
             return
         self.ticker.min_ticks = max(

artiq/test/coredevice/test_analyzer.py

@@ -74,4 +74,4 @@ class AnalyzerTest(ExperimentCase):
         log  = "".join([_extract_log_chars(msg.data)
                         for msg in dump.messages
                         if isinstance(msg, OutputMessage) and msg.channel == dump.log_channel])
-        self.assertEqual(log, "foo\x1E32\n\x1D")
+        self.assertEqual(log, "foo\x1E32\x1D")

artiq/test/coredevice/test_performance.py

@@ -0,0 +1,54 @@
+import os
+import unittest
+
+from artiq.experiment import *
+from artiq.test.hardware_testbench import ExperimentCase
+
+
+artiq_low_latency = os.getenv("ARTIQ_LOW_LATENCY")
+
+
+class _Transfer(EnvExperiment):
+    def build(self):
+        self.setattr_device("core")
+        self.data = b"\x00"*(10**6)
+
+    @rpc
+    def source(self) -> TBytes:
+        return self.data
+
+    @rpc(flags={"async"})
+    def sink(self, data):
+        assert data == self.data
+
+    @kernel
+    def host_to_device(self):
+        t0 = self.core.get_rtio_counter_mu()
+        data = self.source()
+        t1 = self.core.get_rtio_counter_mu()
+        return len(data)/self.core.mu_to_seconds(t1-t0)
+
+    @kernel
+    def device_to_host(self):
+        t0 = self.core.get_rtio_counter_mu()
+        self.sink(self.data)
+        t1 = self.core.get_rtio_counter_mu()
+        return len(self.data)/self.core.mu_to_seconds(t1-t0)
+
+
+class TransferTest(ExperimentCase):
+    @unittest.skipUnless(artiq_low_latency,
+                         "timings are dependent on CPU load and network conditions")
+    def test_host_to_device(self):
+        exp = self.create(_Transfer)
+        host_to_device_rate = exp.host_to_device()
+        print(host_to_device_rate, "B/s")
+        self.assertGreater(host_to_device_rate, 2e6)
+
+    @unittest.skipUnless(artiq_low_latency,
+                         "timings are dependent on CPU load and network conditions")
+    def test_device_to_host(self):
+        exp = self.create(_Transfer)
+        device_to_host_rate = exp.device_to_host()
+        print(device_to_host_rate, "B/s")
+        self.assertGreater(device_to_host_rate, 2e6)

artiq/test/lit/escape/error_mutable_aug_asgn.py

@@ -0,0 +1,12 @@
+# RUN: %python -m artiq.compiler.testbench.embedding +diag %s 2>%t
+# RUN: OutputCheck %s --file-to-check=%t
+
+from artiq.experiment import *
+
+@kernel
+def entrypoint():
+    a = [1,2]
+    # CHECK-L: ${LINE:+2}: error: values cannot be mutated in-place
+    # CHECK-L: ${LINE:+1}: note: try using `a = a + [3,4]`
+    a += [3,4]
+

artiq/test/lit/inferencer/error_builtin_calls.py

@@ -9,3 +9,6 @@ list(1)
 
 # CHECK-L: ${LINE:+1}: error: the arguments of min() must be of a numeric type
 min([1], [1])
+
+# CHECK-L: ${LINE:+1}: error: strings currently cannot be constructed
+str(1)

artiq/test/lit/integration/arithmetics.py

@@ -1,5 +1,5 @@
-# RUN: %python -m artiq.compiler.testbench.jit %s
 # RUN: %python %s
+# RUN: %python -m artiq.compiler.testbench.jit %s
 # REQUIRES: exceptions
 
 assert -(-1) == 1
@@ -20,6 +20,12 @@ assert 3 % 2 == 1
 assert -3 % 2 == 1
 assert 3 % -2 == -1
 assert -3 % -2 == -1
+assert -1 % 8 == 7
+#ARTIQ#assert int64(3) % 2 == 1
+#ARTIQ#assert int64(-3) % 2 == 1
+#ARTIQ#assert int64(3) % -2 == -1
+#ARTIQ#assert int64(-3) % -2 == -1
+assert -1 % 8 == 7
 assert 3.0 % 2.0 == 1.0
 assert -3.0 % 2.0 == 1.0
 assert 3.0 % -2.0 == -1.0
@@ -35,6 +41,24 @@ assert -1 >> 32 == -1
 assert 0x18 & 0x0f == 0x08
 assert 0x18 | 0x0f == 0x1f
 assert 0x18 ^ 0x0f == 0x17
+#ARTIQ#assert ~0x18 == -25
+#ARTIQ#assert ~int64(0x18) == -25
 
-assert [1] + [2] == [1, 2]
+try:
-assert [1] * 3 == [1, 1, 1]
+    1 / 0
+except ZeroDivisionError:
+    pass
+else:
+    assert False
+try:
+    1 // 0
+except ZeroDivisionError:
+    pass
+else:
+    assert False
+try:
+    1 % 0
+except ZeroDivisionError:
+    pass
+else:
+    assert False

artiq/test/lit/integration/array.py

@@ -3,3 +3,6 @@
 
 ary = array([1, 2, 3])
 assert [x*x for x in ary] == [1, 4, 9]
+
+assert [1] + [2] == [1, 2]
+assert [1] * 3 == [1, 1, 1]

artiq/test/test_worker.py

@@ -90,9 +90,9 @@ class WorkerCase(unittest.TestCase):
         with self.assertLogs() as logs:
             with self.assertRaises(WorkerInternalException):
                 _run_experiment("ExceptionTermination")
-            self.assertEqual(len(logs.records), 1)
+            self.assertGreater(len(logs.records), 0)
             self.assertIn("Terminating with exception (TypeError)",
-                          logs.output[0])
+                          logs.output[-1])
 
     def test_watchdog_no_timeout(self):
         _run_experiment("WatchdogNoTimeout")

conda/artiq-dev.yaml

@@ -2,9 +2,9 @@
 # $ conda env create -f conda/artiq-dev.yaml
 name: artiq-dev
 channels:
-  - defaults
-  - conda-forge/label/main
   - m-labs/label/dev
   - m-labs/label/main
+  - defaults
+  - conda-forge/label/main
 dependencies:
   - artiq-dev

conda/artiq-dev/meta.yaml

@@ -14,15 +14,14 @@ requirements:
   run:
     - python >=3.5.3,<3.6
     - setuptools 33.1.1
-    - migen 0.5
+    - migen 0.7 py35_0+gite554f07
-    - misoc 0.6
+    - misoc 0.9 py35_0+gitcb8e314c
     - jesd204b 0.3
     - binutils-or1k-linux >=2.27
-    - llvm-or1k
+    - llvm-or1k 4.0.1
-    - llvmlite-artiq 0.12.0
+    - llvmlite-artiq 0.20.0
-    - rust-core-or1k 1.20.0 16
+    - rust-core-or1k 1.23.0 19
-    - cargo 0.11.0
+    - openocd 0.10.0 1
-    - openocd >=0.10
     - lit
     - outputcheck
     - coverage
@@ -38,7 +37,7 @@ requirements:
     - python-dateutil
     - pyqt >=5.5
     - quamash
-    - pyqtgraph
+    - pyqtgraph 0.10.0
     - pygit2
     - aiohttp
     - pythonparser >=1.1

conda/artiq-doc.yaml

@@ -2,10 +2,10 @@
 # $ conda env create -f conda/artiq-doc.yaml
 name: artiq-doc
 channels:
-  - defaults
-  - conda-forge/label/main
   - m-labs/label/dev
   - m-labs/label/main
+  - defaults
+  - conda-forge/label/main
 dependencies:
   - python>=3.5.3,<3.6
   - sphinx=1.4.8

conda/artiq-kc705-nist_clock/build.sh

@@ -9,6 +9,6 @@ mkdir -p $SOC_PREFIX
 V=1 $PYTHON -m artiq.gateware.targets.kc705_dds -H nist_clock --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
 cp misoc_nist_clock_kc705/gateware/top.bit $SOC_PREFIX
 cp misoc_nist_clock_kc705/software/bios/bios.bin $SOC_PREFIX
-cp misoc_nist_clock_kc705/software/runtime/runtime.fbi $SOC_PREFIX
+cp misoc_nist_clock_kc705/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
 
 wget -P $SOC_PREFIX https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/single-tap/bscan_spi_xc7k325t.bit

conda/artiq-kc705-nist_clock/meta.yaml

@@ -6,7 +6,7 @@ source:
   git_url: ../..
 
 build:
-  noarch: generic
+  noarch: python
   ignore_prefix_files: True
   number: {{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}
   string: py_{{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}+git{{ environ.get("GIT_FULL_HASH", "")[:8] }}

conda/artiq-kc705-nist_qc2/build.sh

@@ -9,6 +9,6 @@ mkdir -p $SOC_PREFIX
 V=1 $PYTHON -m artiq.gateware.targets.kc705_dds -H nist_qc2 --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
 cp misoc_nist_qc2_kc705/gateware/top.bit $SOC_PREFIX
 cp misoc_nist_qc2_kc705/software/bios/bios.bin $SOC_PREFIX
-cp misoc_nist_qc2_kc705/software/runtime/runtime.fbi $SOC_PREFIX
+cp misoc_nist_qc2_kc705/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
 
 wget -P $SOC_PREFIX https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/single-tap/bscan_spi_xc7k325t.bit

conda/artiq-kc705-nist_qc2/meta.yaml

@@ -6,7 +6,7 @@ source:
   git_url: ../..
 
 build:
-  noarch: generic
+  noarch: python
   ignore_prefix_files: True
   number: {{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}
   string: py_{{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}+git{{ environ.get("GIT_FULL_HASH", "")[:8] }}

conda/artiq-kc705-phaser/build.sh

@@ -6,9 +6,9 @@ BUILD_SETTINGS_FILE=$HOME/.m-labs/build_settings.sh
 SOC_PREFIX=$PREFIX/lib/python3.5/site-packages/artiq/binaries/kc705-phaser
 mkdir -p $SOC_PREFIX
 
-V=1 $PYTHON -m artiq.gateware.targets.phaser --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
+V=1 $PYTHON -m artiq.gateware.targets.kc705_phaser --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
 cp misoc_phaser_kc705/gateware/top.bit $SOC_PREFIX
 cp misoc_phaser_kc705/software/bios/bios.bin $SOC_PREFIX
-cp misoc_phaser_kc705/software/runtime/runtime.fbi $SOC_PREFIX
+cp misoc_phaser_kc705/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
 
 wget -P $SOC_PREFIX https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/single-tap/bscan_spi_xc7k325t.bit

conda/artiq-kc705-phaser/meta.yaml

@@ -6,7 +6,7 @@ source:
   git_url: ../..
 
 build:
-  noarch: generic
+  noarch: python
   ignore_prefix_files: True
   number: {{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}
   string: py_{{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}+git{{ environ.get("GIT_FULL_HASH", "")[:8] }}

conda/artiq/meta.yaml

@@ -26,10 +26,10 @@ requirements:
     - setuptools 33.1.1
   run:
     - python >=3.5.3,<3.6
-    - llvmlite-artiq 0.12.0.dev py35_30
+    - llvmlite-artiq 0.20.0
-    - binutils-or1k-linux
+    - binutils-or1k-linux >=2.27
     - pythonparser >=1.1
-    - openocd >=0.10
+    - openocd 0.10.0 1
     - lit
     - outputcheck
     - scipy

doc/manual/conf.py

@@ -20,6 +20,12 @@ import sphinx_rtd_theme
 from unittest.mock import MagicMock
 
 
+# Hack-patch Sphinx so that ARTIQ-Python types are correctly printed
+# See: https://github.com/m-labs/artiq/issues/741
+from sphinx.ext import autodoc
+autodoc.repr = str
+
+
 class Mock(MagicMock):
     @classmethod
     def __getattr__(cls, name):

doc/manual/core_device.rst

@@ -162,11 +162,10 @@ Installation
 ............
 
 These installation instructions are a short form of those in the ARTIQ manual.
+
 * See the chapter on setting up a :ref:`development environment <develop-from-conda>`.
-* When compiling the binaries, use the ``phaser`` target:::
+* When compiling the binaries, use the ``phaser`` target: ``python -m artiq.gateware.targets.kc705_phaser``
-  $ python -m artiq.gateware.targets.phaser
+* From time to time and on request there may be pre-built binaries in the ``artiq-kc705-phaser`` package on the M-Labs conda package label.
-* From time to time and on request there may be pre-built binaries in the
-  ``artiq-kc705-phaser`` package on the M-Labs conda package label.
 
 Setup
 .....

doc/manual/developing.rst

@@ -27,7 +27,7 @@ ARTIQ Anaconda development environment
            $ git clone --recursive https://github.com/m-labs/artiq ~/artiq-dev/artiq
            $ cd ~/artiq-dev/artiq
 
-       Add ``-b release-X`` to the ``git clone`` command if you are building a stable branch of ARTIQ (the default will fetch the development ``master`` branch).
+       Add ``-b release-X`` to the ``git clone`` command if you are building a stable branch of ARTIQ. Replace ``X`` with the major release. The default will fetch the development ``master`` branch.
     3. :ref:`Install Anaconda or Miniconda <install-anaconda>`
     4. Create and activate a conda environment named ``artiq-dev`` and install the ``artiq-dev`` package which pulls in all the packages required to develop ARTIQ::
 
@@ -37,10 +37,9 @@ ARTIQ Anaconda development environment
 
            $ pip install -e .
     6. :ref:`Install Vivado <install-xilinx>`
-    7. :ref:`Obtain and install the JTAG SPI flash proxy bitstream <install-bscan-spi>`
+    7. :ref:`Configure OpenOCD <setup-openocd>`
-    8. :ref:`Configure OpenOCD <setup-openocd>`
+    8. :ref:`Build target binaries <build-target-binaries>`
-    9. :ref:`Build target binaries <build-target-binaries>`
+    9. :ref:`Flash target binaries <flash-target-binaries>`
-    10. :ref:`Flash target binaries <flash-target-binaries>`
 
 .. _install-from-source:
 
@@ -90,22 +89,22 @@ and the ARTIQ kernels.
 * Install LLVM and Clang: ::
 
         $ cd ~/artiq-dev
-        $ git clone -b artiq-3.9 https://github.com/m-labs/llvm-or1k
+        $ git clone -b artiq-4.0 https://github.com/m-labs/llvm-or1k
         $ cd llvm-or1k
-        $ git clone -b artiq-3.9 https://github.com/m-labs/clang-or1k tools/clang
+        $ git clone -b artiq-4.0 https://github.com/m-labs/clang-or1k tools/clang
 
         $ mkdir build
         $ cd build
-        $ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_INSTALL_UTILS=ON
+        $ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=OR1K -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_INSTALL_UTILS=ON -DCLANG_ENABLE_ARCMT=OFF -DCLANG_ENABLE_STATIC_ANALYZER=OFF
         $ make -j4
         $ sudo make install
 
 * Install Rust: ::
 
         $ cd ~/artiq-dev
-        $ git clone -b artiq-1.20.0 https://github.com/m-labs/rust
+        $ git clone -b artiq-1.23.0 https://github.com/m-labs/rust
         $ cd rust
-        $ git submodule update --init
+        $ git submodule update --init --recursive
         $ mkdir build
         $ cd build
         $ ../configure --prefix=/usr/local/rust-or1k --llvm-root=/usr/local/llvm-or1k --disable-manage-submodules --disable-docs
@@ -113,14 +112,16 @@ and the ARTIQ kernels.
         $ sudo chown $USER.$USER /usr/local/rust-or1k
         $ make install
 
-        $ libs="libcore libstd_unicode liballoc liblibc_mini libunwind"
+        $ libs="core std_unicode alloc"
-        $ rustc="/usr/local/rust-or1k/bin/rustc --target or1k-unknown-none -g -C target-feature=+mul,+div,+ffl1,+cmov,+addc -C opt-level=s -L ."
+        $ rustc="/usr/local/rust-or1k/bin/rustc --target or1k-unknown-none -C target-feature=+mul,+div,+ffl1,+cmov,+addc -C opt-level=s -g --crate-type rlib -L ."
         $ destdir="/usr/local/rust-or1k/lib/rustlib/or1k-unknown-none/lib/"
         $ mkdir ../build-or1k
         $ cd ../build-or1k
-        $ for lib in ${libs}; do ${rustc} ../src/${lib}/lib.rs; done
+        $ for lib in ${libs}; do ${rustc} --crate-name ${lib} ../src/lib${lib}/lib.rs; done
-        $ ${rustc} -Cpanic=abort ../src/libpanic_abort/lib.rs
+        $ ${rustc} --crate-name libc ../src/liblibc_mini/lib.rs
-        $ ${rustc} -Cpanic=unwind ../src/libpanic_unwind/lib.rs --cfg llvm_libunwind
+        $ ${rustc} --crate-name unwind ../src/libunwind/lib.rs
+        $ ${rustc} -Cpanic=abort --crate-name panic_abort ../src/libpanic_abort/lib.rs
+        $ ${rustc} -Cpanic=unwind --crate-name panic_unwind ../src/libpanic_unwind/lib.rs --cfg llvm_libunwind
         $ mkdir -p ${destdir}
         $ cp *.rlib ${destdir}
 

doc/manual/installing.rst

@@ -13,8 +13,8 @@ The conda package contains pre-built binaries that you can directly flash to you
 
 
 .. warning::
-    Conda packages are supported for Linux (64-bit) and Windows (32- and 64-bit).
+    Conda packages are supported for Linux (64-bit) and Windows (64-bit).
-    Users of other operating systems (32-bit Linux, BSD, OSX ...) should and can :ref:`install from source <install-from-source>`.
+    Users of other operating systems (32-bit Linux or Windows, BSD, OSX ...) should and can :ref:`install from source <install-from-source>`.
 
 .. _install-anaconda:
 
@@ -37,18 +37,18 @@ Installing the ARTIQ packages
 
 First add the conda-forge repository containing ARTIQ dependencies to your conda configuration::
 
-    $ conda config --add channels http://conda.anaconda.org/conda-forge/label/main
+    $ conda config --prepend channels http://conda.anaconda.org/conda-forge/label/main
 
 Then add the M-Labs ``main`` Anaconda package repository containing stable releases and release candidates::
 
-    $ conda config --add channels http://conda.anaconda.org/m-labs/label/main
+    $ conda config --prepend channels http://conda.anaconda.org/m-labs/label/main
 
 .. note::
     To use the development versions of ARTIQ, also add the ``dev`` label (http://conda.anaconda.org/m-labs/label/dev).
     Development versions are built for every change and contain more features, but are not as well-tested and are more likely to contain more bugs or inconsistencies than the releases in the ``main`` label.
 
 Then prepare to create a new conda environment with the ARTIQ package and the matching binaries for your hardware:
-choose a suitable name for the environment, for example ``artiq-main`` if you intend to track the main label or ``artiq-2016-04-01`` if you consider the environment a snapshot of ARTIQ on 2016-04-01.
+choose a suitable name for the environment, for example ``artiq-main`` if you intend to track the main label, ``artiq-3`` for the 3.x release series, or ``artiq-2016-04-01`` if you consider the environment a snapshot of ARTIQ on 2016-04-01.
 Choose the package containing the binaries for your hardware:
 
     * ``artiq-kc705-nist_clock`` for the KC705 board with the NIST "clock" FMC backplane and AD9914 DDS chips.
@@ -112,6 +112,9 @@ The ``artiq`` or ``artiq-dev`` conda packages install ``openocd`` automatically
 
 .. _setup-openocd:
 
+Configuring OpenOCD
+^^^^^^^^^^^^^^^^^^^
+
 Some additional steps are necessary to ensure that OpenOCD can communicate with the FPGA board.
 
 On Linux, first ensure that the current user belongs to the ``plugdev`` group. If it does not, run ``sudo adduser $USER plugdev`` and relogin. Afterwards::