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5748 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 34c61db790 artiq_flash: fix Metlino support 2019-05-19 16:37:40 +08:00
Sebastien Bourdeauducq 88b6496c8c artiq_flash: add Metlino support 2019-05-19 16:30:10 +08:00
Sebastien Bourdeauducq 9dcaae6395 metlino: use variant output directory 2019-05-19 16:24:51 +08:00
Sebastien Bourdeauducq b4779969d0 metlino: work around vivado bug (#1230) 2019-05-19 11:27:27 +08:00
Sebastien Bourdeauducq 874542f33f add Metlino support 2019-05-19 10:57:43 +08:00
hartytp cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface (#1323) 2019-05-17 16:12:35 +01:00
David Nadlinger 84b91ee8bd master/scheduler: Document Deleter semantics [nfc] 
From looking at the code, it wasn't obvious to me that this is
supposed to handle multiple calls to delete(). This is the case,
however, when for instance Scheduler.delete()ing a run, which
will then also be deleted again from AnalyzeStage.
 2019-05-14 22:37:16 +01:00
hartytp c2b4f0cfe3
sync_struct: catch ConnectionErrors in _receive_cr (#1319) 2019-05-10 12:53:51 +01:00
hartytp bbcd1db025
sync_struct: replace ConnectionError subclasses with ConnectionError (#1318) 2019-05-10 12:48:12 +01:00
hartytp 30fe624fe5
sync_struct: flake8 [nfc] (#1317) 2019-05-10 12:42:06 +01:00
Sebastien Bourdeauducq 1a3d71760d consolidate kasli example folders 2019-05-10 12:17:38 +08:00
Sebastien Bourdeauducq f551491a84 remove sayma_masterdac example 2019-05-10 12:13:07 +08:00
Sebastien Bourdeauducq 72f7f8386f remove old Kasli device databases (#1289) 2019-05-10 12:11:42 +08:00
Sebastien Bourdeauducq 86f462f40e artiq_ddb_template: add edge counter support 2019-05-09 17:20:13 +08:00
Sebastien Bourdeauducq fda3cb2482 kasli_generic: add edge counter support 2019-05-09 17:19:11 +08:00
Robert Jördens ead9a42842 kasli: remove VLBAIMaster, VLBAISatellite variants 2019-05-08 15:58:25 +00:00
Robert Jördens 0c9b810501 kasli: remove PTB/PTB2/LUH/HUB variants 
see sinara-systems and nix-scripts repos
 2019-05-08 15:51:18 +00:00
Robert Jördens 1d2cc60e0d kasli_generic: support ext_ref 2019-05-08 15:51:18 +00:00
Sebastien Bourdeauducq 948ea396c0 remove old buildbot kc705 device-db 2019-05-07 17:28:06 +08:00
Sebastien Bourdeauducq 3209197b0b artiq_flash: do not needlessly look for artifacts 2019-05-07 17:20:13 +08:00
Sebastien Bourdeauducq a1c97ec4dd kasli_tester: support selection of TTL output to use as stimulus 2019-05-07 16:58:00 +08:00
Sebastien Bourdeauducq 4cc9bd33ce test: only test_rpc_timing actually requires ARTIQ_LOW_LATENCY 2019-04-24 11:22:07 +08:00
Sebastien Bourdeauducq bb39eedf5b fix previous commit 2019-04-20 10:44:07 +08:00
Sebastien Bourdeauducq 93f4f31f45 devices.ctlmgr -> master.ctlmgr 2019-04-20 00:25:44 +08:00
Sebastien Bourdeauducq 56033b60a7 move thorlabs_tcube out of tree (#887) 2019-04-20 00:09:58 +08:00
Sebastien Bourdeauducq eaec519ac8 move lda out of tree (#887) 2019-04-19 23:43:14 +08:00
Sebastien Bourdeauducq d4781e9a8a aqctl_corelog: add simulation mode 2019-04-19 23:42:37 +08:00
Sebastien Bourdeauducq 62e9b2d85e move novatech409b out of tree (#887) 2019-04-19 21:56:16 +08:00
Sebastien Bourdeauducq 4c1fb0c2a1 move korad_ka3005p out of tree (#887) 2019-04-19 19:47:41 +08:00
Sebastien Bourdeauducq 73d6078883 use IP instead of hostname for kc705-1 
Makes it easier to run tests in the Windows VM
 2019-04-18 22:59:32 +08:00
David Nadlinger 4d215cf541 firmware: Add Si5324 config for 125 MHz ext ref 
PLL divider settings as suggested by DSPLLsim 5.1.
 2019-04-15 22:22:19 +01:00
David Nadlinger dc7a642b26 test/lit: Make abs() integration test slightly more interesting 
I had accidentally not included this local diff in the PR that was
merged as commit cdaf554736.

Doesn't include tests for any of the interesting edge cases yet
(nans, infinities, signed zero, int.min), some of which might be
handled differently than by the host Python. In particular, the
select condition should logically use copysign(arg, 1) for the
comparison (i.e., always clear the sign bit), but currently the
chance of anyone running FP-heavy algorithms where this would
matter on the core device is close to zero [1].

[1] Sign of your choice.
 2019-04-14 04:12:40 +01:00
David Nadlinger cdaf554736 compiler: Implement abs() for scalars 
GitHub: Fixes #1303.
 2019-04-13 13:39:16 +08:00
Sebastien Bourdeauducq 97b7ed557b sayma_amc: do not use SFP0 (now used for Ethernet) 2019-04-12 18:47:18 +08:00
David Nadlinger cd7a5a3683 firmware: Fix kernel RPC handling of zero-size values (e.g. empty arrays) 2019-03-31 18:33:44 +01:00
David Nadlinger b4ddf4c86b firmware: Make "unexpected reply from kernel CPU" log messages unique 
This makes it easier to localize issues based on the log output.
 2019-03-31 18:31:56 +01:00
David Nadlinger 236b30ac5f coredevice: Add test for recent kernel RPC fixes 
This covers all three (de)serialisation fixes.
 2019-03-31 18:25:56 +01:00
David Nadlinger 88fd5c8440 compiler: Fix crash in escape analysis for assigning string literals 2019-03-31 17:10:27 +01:00
David Nadlinger 990e0b7dd9 compiler: Fix comparison of tuples of lists 2019-03-31 17:10:27 +01:00
David Nadlinger baf102dbb2 compiler: Fix comparison of nested lists 2019-03-31 17:10:27 +01:00
David Nadlinger 8e225433a5 firmware: Fix kernel RPC strings size (memory corruption) 
Test case to follow.
 2019-03-31 17:10:27 +01:00
David Nadlinger b8ff627be9 firmware: Fix kernel RPC tuple size calculation (memory corruption) 
Test case to follow.
 2019-03-31 17:10:27 +01:00
David Nadlinger fc95183e04 coredevice: Fix host-side serialization of (nested) lists 
Test case to follow.
 2019-03-31 17:10:27 +01:00
David Nadlinger f9af058b96 compiler: Quote tuples as TTuple values 
Previously, they would end up being TInstances,
rendering them useless.
 2019-03-31 23:40:21 +08:00
Sebastien Bourdeauducq 3634cfac86 typo 2019-03-31 22:27:07 +08:00
Sebastien Bourdeauducq 4580f3dac8 test/lit: support overriding libartiq_support.so 2019-03-31 22:26:09 +08:00
Chris Ballance 4499ef1748 kasli: only add moninj core if there are probes to monitor 2019-03-24 14:09:52 +08:00
Sebastien Bourdeauducq 5d31cf2268 sayma_rtm2: si5324_clkout -> cdr_clk_clean 2019-03-23 13:48:36 +08:00
Sebastien Bourdeauducq 560849e693 sayma_amc: add DRTIO transceiver on rtm_amc_link for v2 hardware 2019-03-23 13:41:22 +08:00
Sebastien Bourdeauducq bbb8c00518 sayma_amc: default to satellite variant 2019-03-23 13:37:55 +08:00
Sebastien Bourdeauducq 18fbe0b081 sayma_rtm_drtio: support v2 hardware 2019-03-23 13:31:28 +08:00
Sebastien Bourdeauducq c7205ad82f sayma_rtm: preliminary v2 support 2019-03-23 12:37:03 +08:00
Sebastien Bourdeauducq d07c6fcfea ad9910: handle unprogrammed EEPROM and numpy corner cases 2019-03-22 14:28:47 +08:00
Chris Ballance 7cdcaf0d00 tests: fix coredevice tests after implementing scheduler defaults 2019-03-22 07:27:55 +08:00
Sebastien Bourdeauducq 33b28f6e56 sayma_amc: add placeholder code to use DDMTD signals on v2 hardware 2019-03-21 17:37:22 +08:00
Sebastien Bourdeauducq 2ec5a58c59 sayma_amc: si5324_clkout -> cdr_clk_clean 2019-03-21 14:09:33 +08:00
Chris Ballance af785b9a9c artiq_compile: fix after adding scheduler defaults 
Closes #1290
 2019-03-21 09:56:19 +08:00
Sebastien Bourdeauducq 8d2c1be44f artiq_flash: ignore rtm_gateware on Sayma for variant autodetection 2019-03-17 15:57:50 +08:00
Sebastien Bourdeauducq c2622297bd urukul: use board_data instead of user_data to store calibration in EEPROM 2019-03-15 17:57:35 +08:00
Sebastien Bourdeauducq a01425bc9c kasli_tester: do not attempt to synchronize AD9912 Urukul 2019-03-15 17:13:29 +08:00
Chris Ballance fcf8828cb6 fix tests, artiq_run after implementing scheduler defaults (#1290) 2019-03-13 17:20:30 +01:00
Sebastien Bourdeauducq 5e7c83c9cf artiq_ddb_template: enable Urukul synchronization from EEPROM 2019-03-13 15:42:51 +08:00
Sebastien Bourdeauducq e504262b67 kasli_tester: calibrate Urukul synchronization and write to EEPROM 2019-03-13 15:36:05 +08:00
Sebastien Bourdeauducq 346299e7f8 kasli_tester: enable EEPROM for Urukul synchronization 2019-03-13 15:35:23 +08:00
Sebastien Bourdeauducq 04e0c23e78 ad9910: support reading synchronization values from EEPROM 2019-03-13 15:34:47 +08:00
Sebastien Bourdeauducq 852048dce4 artiq_ddb_template: create Urukul EEPROM device 2019-03-13 15:34:23 +08:00
Sebastien Bourdeauducq 964a349a19 add Kasli I2C driver 2019-03-13 15:33:50 +08:00
Chris Ballance c56c3e5588 dashboard: add support for experiment pipeline/priority/flush defaults 2019-03-12 10:54:15 +01:00
Chris Ballance 8659c769cb master/language: add methods to set experiment pipeline/priority/flush defaults 2019-03-12 10:54:15 +01:00
Sebastien Bourdeauducq b2177eff81 kasli_tester: run test_i2c_switch 2019-03-11 21:06:28 +08:00
Sebastien Bourdeauducq 227c729f56 fix permissions 2019-03-11 20:43:28 +08:00
David Nadlinger b3db3ea6fc dashboard: Sort TTL moninj channels by name 
With growing system complexity, the moninj channel index is
no longer a very intuitive ordering for typical end users.
 2019-03-11 03:30:14 +01:00
David Nadlinger 5fd92a6175 gui: Fix crash when quickly opening/closing applets 
Quickly closing/reopening applets (e.g. quickly clicking the checkbox
on an entire folder of applets) would previously lead to an occasional
KeyError on the self.dock_to_item access in on_dock_closed, as close()
would be invoked more than once.

The geometry/checked state handling can potentially be cleaned up
further, but at least this avoid the crash.
 2019-03-10 20:57:10 +00:00
Sebastien Bourdeauducq e47ba4b35e kasli_generic: fix identifier string 2019-03-08 19:57:20 +08:00
Sebastien Bourdeauducq b219f8b5c7 artiq_flash: autodetect variant 2019-03-08 19:47:24 +08:00
Sebastien Bourdeauducq fc9d4c7bdc artiq_flash: fix sayma master detection 2019-03-08 19:36:35 +08:00
Sebastien Bourdeauducq 25bcebd1f6 artiq_flash: not all boards are development boards 2019-03-08 19:35:20 +08:00
Sebastien Bourdeauducq ed2d8dfa7a artiq_flash: resolve openocd symbolic links 
On NixOS, openocd may be a symlink in /run/current-system/sw/bin when installed system-wide.
 2019-03-08 12:43:06 +08:00
Sebastien Bourdeauducq 0d05d4b813 artiq_client: python 3.7 compatibility 2019-02-26 17:09:38 +08:00
Sebastien Bourdeauducq ec966de007 thorlabs_tcube: cleanup 2019-02-26 16:50:19 +08:00
Sebastien Bourdeauducq 62c7f75a9e sayma_amc: support hardware revisions 2019-02-25 23:49:45 +08:00
Sebastien Bourdeauducq d45249197c siphaser: improve ultrascale clock routing 2019-02-25 23:00:01 +08:00
Sebastien Bourdeauducq de3992bbdd kasli: remove HUST variants (supported by kasli_generic) 2019-02-23 15:44:17 +08:00
Sebastien Bourdeauducq 791f830ef6 kasli_generic: support DRTIO 2019-02-23 15:41:05 +08:00
Sebastien Bourdeauducq d39338d59f artiq_ddb_template: fix --satellite 2019-02-23 15:27:18 +08:00
Sebastien Bourdeauducq d79a6ee41c artiq_ddb_template: fix pll_vco indentation 2019-02-22 23:50:30 +08:00
Sebastien Bourdeauducq 62985fbd29 binaries -> board-support 2019-02-22 23:18:01 +08:00
Sebastien Bourdeauducq 1c35c051a5 kasli: remove variants supported by generic builder 2019-02-22 23:08:49 +08:00
Sebastien Bourdeauducq 05b128469f artiq_ddb_template: support setting Urukul pll_vco 2019-02-22 22:59:20 +08:00
Sebastien Bourdeauducq cd60803f21 device_ddb_template: add Sampler, Zotino, Grabber and SFP LED support 2019-02-22 20:07:15 +08:00
Sebastien Bourdeauducq 269f0a4d6f artiq_ddb_template: add Urukul support 2019-02-22 19:33:27 +08:00
Sebastien Bourdeauducq 8049c52d06 frontend: add artiq_ddb_template (WIP, TTL only) 2019-02-22 17:19:48 +08:00
Sebastien Bourdeauducq 8edc2318ab style 2019-02-22 17:19:20 +08:00
Robert Jördens aee8965897 ad9910: add ram conversion tooling and unittests 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-02-21 15:59:52 +00:00
Robert Jördens ec6588174b ad9910: add ram operation unittests 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-02-21 15:14:32 +00:00
Robert Jördens b57cad77ad ad9910: make ram read work for short segments 
also cleanup and style

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-02-21 14:47:58 +00:00
Sebastien Bourdeauducq 596d3e20d7 dashboard,browser: do not call get_user_config_dir() in argparse 
This caused two problems when building the docs:
* the path printed in the docs depends on the machine where they are built
* it pollutes ~/.config, and also breaks Nix builds
 2019-02-19 15:43:04 +08:00
Sebastien Bourdeauducq 40a0cf806d support overriding versioneer 2019-02-17 14:49:52 +08:00
Sebastien Bourdeauducq 6ad2e13515 kasli: add generic builder (WIP) 2019-02-12 19:18:09 +08:00
Sebastien Bourdeauducq 2104a93f78 build_soc: allow overriding SoC class name 2019-02-12 18:33:52 +08:00
Sebastien Bourdeauducq ff4e4f15ed kasli: expose base SoC classes 2019-02-12 18:33:27 +08:00
whitequark 0a84dd38c1 Add missing test from d6eb2b02. 2019-02-10 07:25:53 +00:00
David Nadlinger 01c3000ef3 master: Print offending key on HDF5 dataset type error 
This helps debugging the cause of TypeErrors arising from types
not handled by the HDF5 serializer, as the backtrace doesn't
otherwise include any useful information.
 2019-02-09 20:50:38 +00:00
David Nadlinger 56b2e0c262 artiq_influxdb: Support append() in dataset _Mock 
This went undetected as append mods were not actually in use
in any part of the codebase previously.
 2019-02-09 20:50:38 +00:00
David Nadlinger bf84226c7d language: Support appending to datasets 2019-02-09 20:50:38 +00:00
David Nadlinger 820326960e test: Add basic experiment dataset interface tests 2019-02-09 20:50:38 +00:00
Robert Jördens 2de1eaa521 dashboard: reconnect to core moninj 
* handle disconnects like core device address changes and do a
  disconnect/connect iteration
* after connection failure wait 10 seconds and try again
* this addresses the slight regression from release-2
  to release-3 where the moninj protocol was made stateful
  (#838 and #1125)
* it would be much better to fix smoltcp/runtime to no loose the
  connection under pressure (#1125)
* the crashes reported in #838 look more like a race condition
* master disconnects still require dashboard restarts

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-02-08 23:52:16 +08:00
Sebastien Bourdeauducq 1cfd26dc2e kasli: add UNSW variant 2019-02-08 17:51:51 +08:00
Sebastien Bourdeauducq 3e8fe3f29d suservo: fix permissions 2019-02-08 14:54:02 +08:00
David Nadlinger ef934ad958 Add test/release notes for command-less controllers 
See eaa1b44b00 for the actual change.
 2019-02-07 21:51:15 +00:00
Chris Ballance eaa1b44b00 ctlmgr: ignore controllers without a "command" field 
Allow controllers to be specified without a "command" field. The user takes
responsibility for ensuring the controller is running: the controller manager
does not attempt to ping the controller. This is useful when one has a common
controller shared between several masters.
 2019-02-07 21:50:29 +00:00
hartytp 0ebff04ad7 SUServo: apply bit masks to servo memory writes to prevent overflows 
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
 2019-02-07 17:04:11 +01:00
hartytp f6142816b8
Revert "SUServo: remove references to non-existent a0 parameter" (#1270) 
This reverts commit f3aab2b891.

Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
 2019-02-07 15:57:43 +00:00
hartytp fe63c9b366
SUServo: remove references to non-existent a0 parameter (#1268) 
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
 2019-02-07 15:29:32 +00:00
hartytp df6c1fca2c
SUServo: flake8 [NFC] (#1267) 
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
 2019-02-07 15:13:44 +00:00
hartytp 87e85bcc14 suservo: fix coefficient data writing 
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
 2019-02-07 14:47:11 +01:00
whitequark d6eb2b023a compiler: monomorphize casts first, but more carefully. 
This reverts 425cd7851, which broke the use of casts to define
integer width.

Instead of it, two steps are taken:
  * First, literals are monomorphized, leading to predictable result.
  * Second, casts are monomorphized, in a top-bottom way. I.e.
    consider the expression `int64(round(x))`. If round() was visited
    first, the intermediate precision would be 32-bit, which is
    clearly undesirable. Therefore, contextual rules should take
    priority over non-contextual ones.

Fixes #1252.
 2019-02-07 06:24:32 +00:00
Sebastien Bourdeauducq b56c7cec1e kasli: use 100MHz RTIO and 800MHz Urukul frequencies on Berkeley target 
Urukul sync is not reliable at 125/1000
 2019-02-05 11:24:45 +08:00
Sebastien Bourdeauducq 5a7460a38e kasli: add sync delays to device_db_berkeley 2019-02-01 22:14:03 +08:00
Sebastien Bourdeauducq ea431b6982 sayma_rtm: use 150MHz RTIO freq for DDMTD 2019-01-31 20:43:44 +08:00
Sebastien Bourdeauducq ec230d6560 sayma: move SYSREF DDMTD to the RTM 
Put RTM Si5324 into bypass mode before running.
Needs rework to cut RTM Si5324 reset trace.
Needs rework to fix LVDS termination on RTM R310/R313 and R314/R315.
Needs uFL jumper cables between RTM "REF LO DIAG" and "CRD AUX CLKIN" (sic).
 2019-01-31 20:39:33 +08:00
Sebastien Bourdeauducq 8119000982 sayma_rtm_drtio: use Si5324 soft reset 
Needs easy board rework to cut trace at pin 1 of Si5324.
The Si5324 contains an internal pull-up on that pin.

Allows using Si5324 + HMC7043 chips at the same time.

Allows the Si5324 bypass hack for DDMTD experiments on the RTM.
 2019-01-31 19:43:54 +08:00
Sebastien Bourdeauducq 82106dcd95 si5324: add bypass function 2019-01-31 19:38:55 +08:00
Sebastien Bourdeauducq 8bbd4207d8 si5324: use consistent bitmask 2019-01-31 19:35:56 +08:00
Sebastien Bourdeauducq d3c608aaec jesd204sync: reset and check lock status of DDMTD helper PLL in firmware 2019-01-31 15:11:16 +08:00
Sebastien Bourdeauducq fa3b40141d hmc830_7043: document sayma clock muxes 2019-01-31 15:10:11 +08:00
Sebastien Bourdeauducq ec8560911f siphaser: bugfixes 
* Fix integer overflow in degree computation
* Add some phase slips after the first transition to get out of the jitter zone and avoid intermittent short windows
 2019-01-30 16:56:38 +08:00
Sebastien Bourdeauducq c591009220 sayma: report TSC phase of SYSREF (TSC LSBs on SYSREF rising edge) in SYSREF sampler 
Better visibility, better diagnostics, allows some changing of SYSREF frequency while keeping the same gateware.
 2019-01-29 23:30:01 +08:00
Sebastien Bourdeauducq 9d0d02a561 jesd204sync: increase tolerance for coarse->final target in calibrate_sysref_target 
There is plenty of slack (it only needs to meet timing at the RTIO frequency).
 2019-01-29 16:48:55 +08:00
Sebastien Bourdeauducq ed6aa29897 jesd204sync: print more information on test_slip_ddmtd error 2019-01-29 16:47:29 +08:00
Sebastien Bourdeauducq 2e8decbce3 kasli_sawgmaster: generate a HMC830 clock with Urukul 2019-01-29 15:06:45 +08:00
Sebastien Bourdeauducq 9ae57fd51e sayma: pass rtio_clk_freq to DDMTD core 2019-01-29 15:06:45 +08:00
Robert Jördens 90c9fa446f test: add array transfer test 
200 kB/s, more than a factor of 10 slower than the bare string transfer

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-28 14:30:44 +00:00
Sebastien Bourdeauducq 7a5d28b73d jesd204sync: test SYSREF period 2019-01-28 19:11:38 +08:00
Sebastien Bourdeauducq 1a42e23fb4 jesd204sync: print DDMTD SYSREF final alignment delta 2019-01-28 18:39:16 +08:00
Sebastien Bourdeauducq eebff6d77f jesd204sync: fix max_phase_deviation 2019-01-28 18:38:18 +08:00
Sebastien Bourdeauducq b9e3fab49c jesd204sync: improve messaging 2019-01-28 18:37:46 +08:00
Sebastien Bourdeauducq 145f08f3fe jesd204sync: update SYSREF S/H limit deviation tolerance 
Follows the increased DDMTD resolution.
 2019-01-28 18:21:31 +08:00
Sebastien Bourdeauducq ba21dc8498 jesd204sync: improve messaging 2019-01-28 18:08:20 +08:00
Sebastien Bourdeauducq 3acee87df2 firmware: improve DDMTD resolution using dithering/averaging 2019-01-28 16:04:04 +08:00
Sebastien Bourdeauducq cfe66549ff jesd204sync: cleanup DDMTD averaging code 2019-01-28 14:14:50 +08:00
Sebastien Bourdeauducq 2b0d63db23 hmc830_7043: support 125MHz RTIO 2019-01-28 13:44:08 +08:00
Sebastien Bourdeauducq bdd4e52a53 ad9154: support 125MHz RTIO 2019-01-28 13:43:52 +08:00
Sebastien Bourdeauducq 47312e55d3 sayma: set RTIO_FREQUENCY in MasterDAC 2019-01-28 13:43:28 +08:00
Sebastien Bourdeauducq 443d6d8688 sayma_amc: pass RTIO clock frequency to SiPhaser 2019-01-28 09:49:03 +08:00
Sebastien Bourdeauducq 3b6f47886e firmware: print more info on DDMTD stability error 2019-01-27 23:06:11 +08:00
Sebastien Bourdeauducq 74fdd04622 firmware: test DDMTD stability 2019-01-27 20:39:12 +08:00
Sebastien Bourdeauducq 81b0046f98 ddmtd: add deglitchers 2019-01-27 20:38:41 +08:00
Sebastien Bourdeauducq 8254560577 sayma: properly determine SYSREF coarse calibration target 2019-01-27 16:00:36 +08:00
Sebastien Bourdeauducq 214394e3b0 sayma: reimplement DAC SYSREF autocalibration 2019-01-27 15:28:39 +08:00
Sebastien Bourdeauducq fdbf1cc2b2 sayma: rework DAC SYSREF margin validation 
Previous code did not work when delay range was not enough for two rotations.
This removes autocalibration, to be done later. Uses hardcoded value for now.
 2019-01-27 14:17:54 +08:00
Sebastien Bourdeauducq 7e5c062c2c firmware: bypass channel divider for HMC7043 DCLK 2019-01-27 11:49:34 +08:00
Sebastien Bourdeauducq f73ffe44f9 firmware: implement DDMTD-based SYSREF/RTIO alignment (draft) 
Mostly works and usually gets the DAC synchronized at 2.4GHz with Urukul across DRTIO.

Needs cleanup and optimization/characterization.
 2019-01-27 09:51:24 +08:00
Sebastien Bourdeauducq 8632b553d2 ddmtd: use IOB register to sample input 2019-01-27 09:50:02 +08:00
Sebastien Bourdeauducq d1ef036948 kasli_sawgmaster: initialize SAWG phase according to RTIO TSC 2019-01-27 09:49:31 +08:00
Sebastien Bourdeauducq 9966e789fc sayma: simplify Ultrascale LVDS T false path 
Recommended by Xilinx.
 2019-01-25 23:40:48 +08:00
Sebastien Bourdeauducq 359fb1f207 sayma: fix DDMTD STA 2019-01-25 23:39:19 +08:00
Sebastien Bourdeauducq cb04230f86 sayma: SYSREF setup/hold validation demonstration 
This also removes the standalone target as the ISERDES used
for setup/hold check requires the fine RTIO clock, which in turn
requires a DRTIO transceiver due to the Ultrascale TPWS bug.
 2019-01-25 16:58:58 +08:00
Sebastien Bourdeauducq 3356717316 sayma: DDMTD SYSREF measurement demonstration 2019-01-25 16:00:31 +08:00
Sebastien Bourdeauducq 4941fb3300 sayma: 2.4GHz DAC clocking (4X interpolation) 
* gets another clock divider out of the way
* gets one cycle within range of the HMC7043 analog delay alone
* SYSREF/RTIO alignment removed, to be replaced with DDMTD-based scheme
 2019-01-25 13:47:04 +08:00
Sebastien Bourdeauducq cc9420d2c8 hmc7043: fix divider programming 2019-01-25 11:48:50 +08:00
Robert Jördens 8c5a502591 ad53xx: ignore F3 (reserved) 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-24 15:50:46 +01:00
Sebastien Bourdeauducq bbac92442f sayma: check hmc7043 slip period 2019-01-24 20:13:43 +08:00
Sebastien Bourdeauducq a92cc91dcb kasli_sawgmaster: correctly tune DDS and SAWG 2019-01-24 19:37:14 +08:00
Sebastien Bourdeauducq f8b39b0b9a sayma: enable 2X DAC interpolation 
Seems to work just fine and gets one clock divider out of the way.
 2019-01-24 18:28:01 +08:00
Sebastien Bourdeauducq 07b5b0d36d kasli: adapt Master target to new hardware 2019-01-24 18:27:15 +08:00
Sebastien Bourdeauducq 154269b77a kasli: fix HUST satellite Urukul 2019-01-23 17:59:43 +08:00
Sebastien Bourdeauducq 3b5fd3ac11 kasli_tester: fix grabber test 2019-01-23 17:59:25 +08:00
Sebastien Bourdeauducq 330c5610e9 ad9912: fix imports 2019-01-23 17:59:08 +08:00
Sebastien Bourdeauducq 390f05f762 firmware: use smoltcp release 2019-01-23 16:15:05 +08:00
Sebastien Bourdeauducq d7e6f104d2 kasli: add HUST variants 2019-01-23 14:11:51 +08:00
Sebastien Bourdeauducq 81f2b2c864 kasli: remove unpopulated Tester EEMs 
* matches hardware and avoids issues with programs that process the DDB (e.g. kasli_tester)
* shortens compilation times
 2019-01-23 12:14:44 +08:00
Robert Jördens b692981c8e ad9910: add note about red front panel led 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-22 12:49:42 +01:00
Sebastien Bourdeauducq a0eba5b09b satman: support Grabber 2019-01-22 19:36:13 +08:00
Sebastien Bourdeauducq 2e3555de85 firmware: fix compilation error with more than 1 Grabber 2019-01-22 19:35:46 +08:00
Sebastien Bourdeauducq 9ee5fea88d kasli: support optional SATA port for DRTIO 2019-01-22 18:06:48 +08:00
Robert Jördens 91e375ce6a ad9910: don't reset the input divide-by-two 
suspected of causing weird PLL lock timout errors
https://freenode.irclog.whitequark.org/m-labs/2019-01-22#1548148750-1548143221;

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-22 09:37:20 +00:00
Robert Jördens 81ff3d4b29 ad9912: add some slack after init 2019-01-21 17:10:58 +00:00
Sebastien Bourdeauducq a9678dd9f2 test_frontends: always skip GUI programs 
The "import PyQt5" hack breaks on nix/hydra.
 2019-01-21 23:41:07 +08:00
Sebastien Bourdeauducq 84f7d006e8 ad9910: add precision about tune_io_update_delay/tune_sync_delay order 2019-01-21 19:40:55 +08:00
Sebastien Bourdeauducq 30051133b7 urukul: fix typos 2019-01-21 19:40:55 +08:00
Sebastien Bourdeauducq 30b2f54baa kasli_tester: skip Zotino test when no Zotino is present 2019-01-21 18:11:41 +08:00
Sebastien Bourdeauducq bff8c8cb05 kasli: add Berkeley variant 2019-01-21 17:44:17 +08:00
Sebastien Bourdeauducq a987d2b2e5 kasli_tester: skip Grabber test when no Grabber is present 2019-01-21 17:43:48 +08:00
David Nadlinger 4ba4e9c540 test_scheduler: Test for hang when exiting with running experiments 
The respective code path in artiq.master.scheduler._mk_worker_method
wasn't previously covered.
 2019-01-20 19:45:50 +00:00
David Nadlinger 0dab7ecd73 master: Include RID in worker exception messages 
This helps when debugging unexpected shutdown problems
after the fact.
 2019-01-20 19:45:50 +00:00
David Nadlinger e24e893303 master/scheduler: Fix misleading indentation [nfc] 2019-01-20 19:45:47 +00:00
David Nadlinger e165a9a352 sync_struct: Factor action strings out into enum and document them [nfc] 2019-01-19 20:19:17 +00:00
David Nadlinger c213ab13ba sync_struct: Notifier.{read -> raw_view}, factor out common dict update code [nfc] 2019-01-19 20:19:17 +00:00
David Nadlinger bd71852427 sync_struct: Tweak variable name to avoid confusion with `init` mod action [nfc] 2019-01-19 20:19:17 +00:00
David Nadlinger 90c144a685 test_pc_rpc: Remove leftover debug print [nfc] 
This tidies up the test suite output, and we have verbose asserts
to show further information on breakage, should it occur.
 2019-01-19 20:18:33 +00:00
Sebastien Bourdeauducq a2ff2cc173 sayma_amc: use more selective IOBUFDS false path 2019-01-19 11:47:50 +08:00
Robert Jördens 40187d1957 ad9910: support configurable refclk divider and pll bypass 
for #1248

* also always keep refclk input divider (by two) reset
 2019-01-18 12:23:53 +00:00
Robert Jördens 385916a9a4 ad9912: support configurable clk_div 2019-01-18 12:16:08 +00:00
Robert Jördens 2bea5e3d58 urukul: support configurable refclk divider 
for #1248
 2019-01-18 12:09:32 +00:00
Sebastien Bourdeauducq 689714965b monkey_patches: disable for Python >= 3.6.7 
3.6 >=7 are fixed
3.7.0 is incompatible with the monkey patches and they do more harm than good
3.7 >=1 are fixed
 2019-01-15 20:29:20 +08:00
David Nadlinger 1c71ae636a examples: Add edge counters to kasli_tester variant 
This enables test_edge_counter on the CI system.
 2019-01-15 10:55:07 +00:00
David Nadlinger 67a6882e91 examples: Fix kasli_tester device_db offset comments 2019-01-15 10:55:07 +00:00
David Nadlinger a565f77538 Add gateware input event counter 2019-01-15 10:55:07 +00:00
Sebastien Bourdeauducq 4cb9f77fd8 sayma_amc: fix Master timing constraints 2019-01-13 13:53:07 +08:00
David Nadlinger 6c52359e59 coredevice: Add _mu suffix to AD991x ref_time arguments 
GitHub: Fixes #1243.
 2019-01-12 17:34:35 +00:00
David Nadlinger 24b1b9a480 Add smoke test for frontend commands 
This ensures that at least --help works for all the commands,
preventing regressions like that in f3323a35d5.
 2019-01-12 13:50:53 +00:00
whitequark 425cd7851e compiler: first monomorphize ints, then casts. 
Fixes #1242.
 2019-01-12 13:40:12 +00:00
whitequark 49682d0159 Improve Python 3.7 compatibility. 
async is now a full (non-contextual) keyword.

There are two more instances:
   - artiq/frontend/artiq_client.py
   - artiq/devices/thorlabs_tcube/driver.py

It is not immediately clear how to fix those, so they are left for
later work.
 2019-01-12 13:17:59 +00:00
David Nadlinger f3323a35d5 artiq_influxdb: Unbreak after verbosity_args rename 
This fixes commit f2c1d32e54.
 2019-01-12 12:02:22 +00:00
David Nadlinger 48fc175a6b coredevice.ttl: More imperative mood in docstrings [nfc] 
This follows Python conventions (PEP257) and unifies the style with
other comments.
 2019-01-12 12:01:55 +00:00
Drew f2c1d32e54 frontend: add --version flag to cmd line args (#1181) 2019-01-12 09:47:47 +08:00
David Nadlinger 3e84ec2bf1 coredevice.ad9910: Fix phase tracking ref_time passing 
This is difficult to test without hardware mocks or some
form of phase readback, but the symptom was that e.g.
`self.dds.set(…, ref_time=now_mu() - 1)` would fail
periodically, that is, whenever bit 32 of the timestamp
would be set (which would be turned into the sign bit).

This is a fairly sinister issue, and is probably a compiler
bug of some sort (either accepts-invalid or wrong type inference).
 2019-01-12 00:47:38 +00:00
Drew 66861e6708 test_pc_rpc: fix equality bug (#1188) (#1239) 
Fixes bug from 5108ed8. Truth value of multi-element numpy array is
not defined. Completes #1186 and fixes/amends #1188.

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2019-01-11 10:15:44 +08:00
Robert Jördens 101671fbbf core_analyzer: support uniform VCD time intervals 
close #1236

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-10 19:35:09 +01:00
Drew 99a0f61b35 artiq_client: remove custom input validation for built-in argparse (#1185) 2019-01-10 12:58:11 +08:00
Drew 721c6f3bcc pc_rpc: fix handling of type annotations 2019-01-10 12:13:22 +08:00
Robert Jördens 088530604e test_ad9910: relax tests 
* tune_sync_delay: the opposite IO_UPDATE to SYNC_CLK alignment may not be perfectly
mis-aligned
* set_mu_speed: seems to be slower on the buildbot

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-09 17:27:42 +00:00
Robert Jördens 19748fe495 ad9910: fix RTIO fine timestamp nudging 
Previously the TSC was truncated to an even coarse RTIO periods before doing
the setting SPI xfer. Afterwards the the IO update pulse would introduce
at least one but less than two RTIO cycles. Ultimately the RTIO TSC was
truncated again to even. If the SPI xfer takes an odd number of RTIO
periods, then a subsequent xfer would collide.

close #1229

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-09 17:22:57 +00:00
Robert Jördens b25ab1fc88 ad9910: add more slack in tune_sync_delay 
close #1235

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-09 16:07:31 +00:00
Sebastien Bourdeauducq 9b213b17af sayma_amc: forward RTM UART in Master variant as well 2019-01-09 18:57:57 +08:00
Sebastien Bourdeauducq c7b18952b8 sayma_amc: work around Ultrascale LVDS Toutbuf_delay_td_pad 2019-01-09 13:47:08 +08:00
Sebastien Bourdeauducq 62599c5f91 firmware: use consistent terminology 2019-01-09 13:46:18 +08:00
Drew b3b0b6f0a5 artiq_influxdb: clarify argparse groups (#1212) 
Make names of argparse group variables relate to what they're doing.
Meets Flake8.

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2019-01-09 11:40:55 +08:00
David Nadlinger 101ed5d534 examples: Fix DRTIO destination indices (#1231) 
Using the default routing table, links numbers and destinations
are offset by 1, as destination 0 is local RTIO.
 2019-01-09 11:40:15 +08:00
Drew 40370c4d45 Docs: fix build warnings (#1234) 
* ad9910: finish CONT_RECIRCULATE -> CONT_RAMPUP

Found while building docs. Forgot to refactor strings.

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>

* spi2: reformat update_xfer_duration_mu docstring

update_xfer_duration_mu docstring threw warning while building docs,
didn't use consistent indent in warning.

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2019-01-09 11:39:23 +08:00
David Nadlinger 4fb434674d coredevice: Fix ad9910 __all__ exports 2019-01-08 18:55:26 +00:00
Sebastien Bourdeauducq 887cb110a7 firmware: fix default DRTIO routing table 2019-01-08 20:46:53 +08:00
David Nadlinger cadde970e1 urukul: Expand CPLD sync_sel explanation [nfc] 2019-01-08 02:37:58 +00:00
David Nadlinger 7bcdeb825b ad9910: Add inverse FTW/ASF conversions 2019-01-08 02:18:14 +00:00
David Nadlinger 4d793d7149 ad9910: Truncate phase word to 16 bits 
This avoids overflowing into the asf portion of the register.
 2019-01-08 02:18:14 +00:00
Sebastien Bourdeauducq 332bd6090f satman: wait for CPLL/QPLL lock after setting drtio_transceiver::stable_clkin 2019-01-07 17:09:19 +08:00
Sebastien Bourdeauducq 3217488824 add Sayma RTM DRTIO target 2019-01-07 00:13:47 +08:00
Sebastien Bourdeauducq b5501aaf00 firmware: program I2C switch on Sayma RTM 2019-01-06 14:54:52 +08:00
Sebastien Bourdeauducq 66b3132c28 sayma_amc: fix RTIO TSC instantiation 2019-01-06 14:54:32 +08:00
Sebastien Bourdeauducq 6e43c41103 firmware: support building without SDRAM 2019-01-05 23:41:30 +08:00
Sebastien Bourdeauducq cf9447ab77 rtio/cri: remove unneeded CSR management 2019-01-05 23:40:45 +08:00
Sebastien Bourdeauducq 2c3510497b firmware: fix not(has_spiflash) build 2019-01-05 23:40:03 +08:00
Sebastien Bourdeauducq 2100a8b1f1 sayma_amc: more fighting with vivado timing analyzer 2019-01-05 12:25:30 +08:00
Drew Risinger b58d59a9e7 pyon: fix grammar in module docstring. 
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2019-01-04 19:31:08 +00:00
Sebastien Bourdeauducq a93fdb8c9d drtio: disable all destinations in gateware at startup 
Otherwise, kernels fail to get a RTIODestinationUnreachable exception when attempting
to reach a DRTIO destination that has never been up.
 2019-01-04 23:42:12 +08:00
Sebastien Bourdeauducq 62d7c89c48 sayma_amc: use high-resolution TTL on SMAs (#792) 2019-01-03 20:50:38 +08:00
Sebastien Bourdeauducq 0972d61e81 ttl_serdes_ultrascale: use GTH clock domains 2019-01-03 20:50:04 +08:00
Sebastien Bourdeauducq f007895fad drtio/gth_ultrascale: fix rtiox clock domain 2019-01-03 20:49:38 +08:00
Sebastien Bourdeauducq 10ebf63c47 jesd204_tools: get the Vivado timing analyzer to behave 2019-01-03 20:22:35 +08:00
Sebastien Bourdeauducq d6a3172a3e update copyright year 2019-01-03 20:21:34 +08:00
Sebastien Bourdeauducq 4af8fd6a0d ttl_serdes_ultrascale: fix Input 2019-01-03 20:14:54 +08:00
Sebastien Bourdeauducq 175f8b8ccc drtio/gth_ultrascale: generate multiplied RTIO clock from BUFG_GT (#792) 2019-01-03 20:14:18 +08:00
Sebastien Bourdeauducq 77126ce5b3 kasli: use hwrev 1.1 by default for DRTIO examples 2019-01-02 23:04:20 +08:00
Sebastien Bourdeauducq ab9ca0ee0a kasli: use 150MHz for DRTIO by default (Sayma compatibility) 2019-01-02 23:03:57 +08:00
Sebastien Bourdeauducq cc58318500 siphaser: autocalibrate skew using RX synchronizer 
* removes the hardcoded, (poorly) manually determined skew value
* does not need si5324_clkout_fabric anymore (broken on Sayma RTM due to wrong IO voltage)
 2019-01-02 22:29:27 +08:00
Sebastien Bourdeauducq f5cda3689e sayma_amc: enable DRTIO on master SATA connector for MasterDAC variant 2019-01-02 16:46:16 +08:00
Drew d60b95f481 tdr.py: typo (#1220) 2018-12-18 18:47:09 +00:00
Robert Jördens a7d4d3bda9 ad9910: CONT_RECIRCULATE -> CONT_RAMPUP 2018-12-17 13:25:00 +00:00
Sebastien Bourdeauducq 35bdf26f01 Merge branch 'ad9910-ram' 2018-12-17 21:16:44 +08:00
David Nadlinger e608d6ffd3 coredevice, firmware: Add rtio_input_timestamped_data 
Integration tests to follow as part of an RTIO counter phy that
makes use of this.
 2018-12-15 00:35:04 +00:00
David Nadlinger 8e30c4574b firmware: Treat timestamps consistently as signed [nfc] 
This matches other functions and the ARTIQ Python side, but
isn't actually an ABI change.
 2018-12-15 00:02:18 +00:00
Sebastien Bourdeauducq 38ce7ab8ff sync_struct: handle TimeoutError as subscriber disconnection. Closes #1215 2018-12-13 06:58:54 +08:00
Robert Jördens 79eadb9465 ad9910: add RAM mode methods 
* also refactor the CFR1 access into a method

c.f. #1154

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-12-11 14:54:16 +00:00
Robert Jördens 6df4ae934f eem: name the servo submodule 
This allows the migen namer to derive names for the ADC return clock
domain in the case of multiple SUServos

close #1201

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-12-11 11:36:40 +01:00
Robert Jördens efd400b02c ad9910: style [nfc] 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-12-11 11:36:25 +01:00
David Nadlinger d4c393b2a8 firmware/ksupport: Update `cfg(not(has_rtio))` stub signatures 
This fixes up 8caea0e6d3,
but it is unclear whether anyone even uses a `not(has_rtio)`
configuration at this point.
 2018-12-11 01:22:48 +00:00
Robert Jördens d90eb3ae88 ad9910: add read64() 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-12-07 21:27:00 +00:00
Robert Jördens baf88050fd urukul: expand attenuator HITL unittests 
* read back with cleared backing state
* individual channel settings
* check backing state

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-12-07 21:06:12 +00:00
Kaifeng cc143d5fec kasli_tester: add support for windows platform. (#1204) 2018-12-05 14:06:45 +01:00
Sebastien Bourdeauducq 6aa341bc44 test_loopback_gate_timing: fix lat_offset 2018-12-02 20:52:32 +08:00
Sebastien Bourdeauducq 421834fa3e compiler: document Target.little_endian 2018-12-02 19:07:18 +08:00
Sebastien Bourdeauducq 981a77834a compiler: use default triple to determine data_layout for JIT 2018-12-02 18:52:13 +08:00
Sebastien Bourdeauducq d931967e5c fix previous commits 2018-12-02 18:32:03 +08:00
Sebastien Bourdeauducq dd03fdfd1a typo 2018-12-02 18:26:54 +08:00
Sebastien Bourdeauducq 8940009e1a compiler: pass data_layout string to llvm.create_target_data before determining endianness 2018-12-02 18:26:19 +08:00
Sebastien Bourdeauducq 2e66788c6c compiler: support little endian target when storing now 2018-12-02 17:40:34 +08:00
Sebastien Bourdeauducq 7e14f3ca4e compiler,gateware: atomic now stores 2018-12-02 05:06:46 +08:00
Sebastien Bourdeauducq fd00021a52 ctlmgr: do not raise exceptions in Controllers.__setitem__. Closes #1198 2018-12-01 18:09:58 +08:00
Sebastien Bourdeauducq 7f55376c75 test_loopback_gate_timing: print input timing for debugging 2018-12-01 18:09:53 +08:00
Sebastien Bourdeauducq dce4f036db grabber: work around windows numpy int peculiarity (same as a81c12de9) 2018-11-30 18:41:14 +08:00
Sebastien Bourdeauducq 156afb48ee language: fix syscall arg handling 2018-11-30 17:59:24 +08:00
Paweł K 57caa7b149 artiq_flash: add command to erase flash memory (#1197) 2018-11-28 12:33:32 +02:00
Sebastien Bourdeauducq c56c0ba41f rtio/dds: use write-only RT2WB 
This saves one address bit and prevents issues with AD9914 and 8-bit addresses.
 2018-11-26 07:38:15 +08:00
Sebastien Bourdeauducq 09141e5bee rtio/wishbone: support write-only interface 2018-11-26 07:38:06 +08:00
Sebastien Bourdeauducq 450a035f9e suservo: move overflowing RTIO address bits into data 2018-11-26 06:54:20 +08:00
Sebastien Bourdeauducq ae8ef18f47 rtlink: sanity-check parameters 2018-11-26 01:14:02 +08:00
Sebastien Bourdeauducq b32e89444c Merge branch 'master' into new 2018-11-26 01:02:19 +08:00
Sebastien Bourdeauducq af9ea1f324 gui: update background 2018-11-26 01:01:36 +08:00
Robert Jördens a81c12de94 urukul: work around windows numpy int peculiarity 
"OverflowError: Python int too large to convert to C long" otherwise

opticlock#74

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-25 16:56:45 +01:00
Sebastien Bourdeauducq 8f9858be4c ad9914: remove automatic continuous phase compensation (like Urukul) 2018-11-19 22:00:20 +08:00
Sebastien Bourdeauducq 22a223bf82 examples/master: clean up remnants of early urukul tests 2018-11-19 21:42:41 +08:00
Sebastien Bourdeauducq 53e79f553f Merge branch 'master' into new 2018-11-19 11:54:50 +08:00
Sebastien Bourdeauducq a3e0b1c5b4 ad9914,spi2: add warnings about driver state and DMA. Closes #1113 2018-11-17 22:10:20 +08:00
Sebastien Bourdeauducq 78d4b3a7da gateware/targets: expose variant lists 
This allows writing scripts that build all variants.
 2018-11-17 22:10:20 +08:00
Sebastien Bourdeauducq 69e699c7bd ttl: compensate for SED latency in input gating 
Closes #1137
 2018-11-17 22:10:20 +08:00
Robert Jördens 3ad68f65c5 urukul: make get_att_mu() not alter state 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-16 14:56:26 +00:00
Robert Jördens d1eee7c0ea ad9910: ensure sync is driven when required 
close #1194

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-16 13:21:01 +00:00
Sebastien Bourdeauducq 1b841805f6 Merge branch 'master' into new 2018-11-16 15:20:32 +08:00
Sebastien Bourdeauducq d3483c1d26 kasli: fix SDRAM read delay reset/wrap issue. Closes #1149 2018-11-15 19:40:35 +08:00
Robert Jördens 494ffca4d3 gui,scan: add CenterScan Scannable variant 
* parametrized by center/span/step instead of
  start/stop/npoints which is more convenient in some applications
* no scan widget support so far

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-15 13:30:43 +08:00
Robert Jördens f77a75ab17 test_ad9910: robustify w.r.t. profile synchronization 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 08:42:27 +01:00
Robert Jördens c3178c2cab ad9910: profile support 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 08:30:28 +01:00
Robert Jördens d0cadfeb4b ad9910: more idiomatic register names 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 07:55:01 +01:00
Robert Jördens a52d1be140 urukul: expose PROFILE setting 
* add documentation
* add unittest

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 07:43:56 +01:00
Robert Jördens 2af6edb8f5 eem: fix reset/sync in suservo 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-13 13:00:54 +00:00
whitequark 248c1cf7dc firmware: fix another TOCTTOU race in sync/async RPC code. 2018-11-13 00:58:20 +08:00
whitequark 68aad3e482 firmware: fix TOCTTOU race in sync/async RPC code. 
Before this commit, the main loop in session code was laid like:

  1. process_kern_queued_rpc
  2. process_host_message
  3. process_kern_message

If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.

Fix this by reordering 1 and 2.
 2018-11-13 00:57:09 +08:00
whitequark dd829afebd firmware: fix another TOCTTOU race in sync/async RPC code. 2018-11-12 15:42:07 +00:00
whitequark 583bba8777 Revert "firmware: workaround for RPC failures" 
This reverts commit 59033d2588.
 2018-11-12 15:36:36 +00:00
whitequark 0edae64afb firmware: fix TOCTTOU race in sync/async RPC code. 
Before this commit, the main loop in session code was laid like:

  1. process_kern_queued_rpc
  2. process_host_message
  3. process_kern_message

If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.

Fix this by reordering 1 and 2.
 2018-11-12 15:30:59 +00:00
Sebastien Bourdeauducq 59033d2588 firmware: workaround for RPC failures 2018-11-12 19:51:54 +08:00
Sebastien Bourdeauducq 84a6b3d09b runtime: fix DMA recording after now-pinning 2018-11-10 14:14:55 +08:00
Robert Jördens a4997c56cf ad9910: simplify edge detection logic 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 18:54:34 +00:00
Robert Jördens 14b6b63916 ad9910: rewire io_delay tuning 
This now reliably locates the SYNC_CLK-IO_UPDATE edge by doing two
scans at different delays between start and stop IO_UPDATE.
It also works well when one delay is very close to the edge.
And it correctly identifies which (start or stop) pulse hit or crossed
the SYNC_CLK edge.

for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 18:38:27 +00:00
Sebastien Bourdeauducq 1f7858b80b test/dsp: fix rtio_output 2018-11-09 22:11:44 +08:00
Sebastien Bourdeauducq e509ab8553 test/dsp: use absolute import path 
Avoids "ImportError: attempted relative import with no known parent package"
when doing a simple "python -m unittest test_XXX.py".
 2018-11-09 22:10:46 +08:00
Robert Jördens 38c6878d49 urukul: mention min/max attenuation 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 13:32:05 +01:00
Robert Jördens e565ca6b82 urukul: slow down att write to datasheet limit 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 13:23:06 +01:00
Robert Jördens 998be50f07 urukul: handle MSB in att_reg 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 13:21:14 +01:00
Sebastien Bourdeauducq c990b5e4f1 Merge remote-tracking branch 'origin/master' into new 2018-11-08 20:21:56 +08:00
Sebastien Bourdeauducq a0cc7311ad test: tighten test_pulse_rate 2018-11-08 20:17:55 +08:00
Sebastien Bourdeauducq 0bee43aa58 sawg: use new rtio_output() API 2018-11-08 20:16:30 +08:00
Sebastien Bourdeauducq bec25cbaa0 suservo: use new rtio_output() API 2018-11-08 20:13:14 +08:00
Sebastien Bourdeauducq e8d58b35b4 spi2: use new rtio_output() API 2018-11-08 20:12:30 +08:00
Sebastien Bourdeauducq d18546550e grabber: use new rtio_output() API 2018-11-08 19:15:50 +08:00
Sebastien Bourdeauducq 2549e623c1 ad9914: use new rtio_output() API 2018-11-08 19:15:44 +08:00
David Nadlinger 9740032a94 firmware: Fix dma_record_output_wide 2018-11-08 11:06:43 +00:00
Sebastien Bourdeauducq f74dda639f drtio: 8-bit address 2018-11-08 18:36:20 +08:00
Sebastien Bourdeauducq 8caea0e6d3 gateware,runtime: optimize RTIO kernel interface further 
* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
 2018-11-08 18:29:24 +08:00
Robert Jördens fcb611d1d2 test_ad9910: don't expect large SYNC_IN delay margins 
sinara-hw/Urukul#16

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-07 18:18:35 +01:00
Sebastien Bourdeauducq aadf5112b7 rtio: remove incorrect comment 2018-11-08 00:02:44 +08:00
Sebastien Bourdeauducq fae95e73ad ttl: use optimized rtio_output API 2018-11-07 23:41:43 +08:00
Sebastien Bourdeauducq 3d0c3cc1cf gateware,runtime: optimize RTIO output interface 
* reduce address to 8 bits
* merge core, channel and address into 32-bit pre-computable "target"
* merge we register into data register
 2018-11-07 23:39:58 +08:00
Robert Jördens e6efe830c4 ad9910: rewire sync delay tuning 
* search from wide window end
* decouple margins and minimum window size
* add note about kasli jitter

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-07 14:52:03 +00:00
Sebastien Bourdeauducq ad0254c17b Merge branch 'switching125' into new 2018-11-07 22:03:18 +08:00
Sebastien Bourdeauducq efd735a6ab Revert "drtio: monitor RTIOClockMultiplier PLL (#1155)" 
This reverts commit 469a66db61.
 2018-11-07 22:01:03 +08:00
Robert Jördens 6c00ab57c0 test_ad9910: relax SYNC window 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 19:31:38 +01:00
Robert Jördens 172633c7da test_ad9910: default to a useful seed 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 17:35:57 +01:00
Robert Jördens 0b2661a34d ad9910: robustify SYNC window finding 
don't integrate too long, find the window tip fast and early
a couple 100 SYNC pulses are sufficient

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 12:41:21 +00:00
Robert Jördens ba4bf6e59b kasli: don't pass rtio pll feedback through bufg 
UG472: "The MMCM performance increases because the
feedback clock is not subjected to noise on the core supply since it
never passes through a block powered by this supply."

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 11:58:55 +00:00
Robert Jördens b6e4961b0f kasli: lower RTIO clock jitter 
* high bandwidth since the si5324 is good
* no low power ibufgds
* drop bufg between ibufgds and pll
* increase pll vco frequency to 1.5 GHz

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 11:43:19 +00:00
Robert Jördens e17e458c58 ptb2: add sync to urukul0 for ad9910 usage 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 10:06:51 +00:00
Robert Jördens 73b7124091 test_ad9910: print sync scan for debugging 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 10:04:21 +01:00
Sebastien Bourdeauducq 9a3d81ffee kasli: fix tester clk_sel 2018-11-06 14:49:21 +08:00
Sebastien Bourdeauducq fb12df7e01 Revert "kasli_tester: urukul0 mmcx clock defunct" 
This reverts commit 68220c316d.
 2018-11-06 14:33:21 +08:00
Robert Jördens 31f68ddf6c Merge branch 'urukul-sync' 
* urukul-sync: (29 commits)
  urukul: flake8 [nfc]
  ad9910: flake8 [nfc]
  urukul/ad9910 test: remove unused import
  test_urukul: relax speed
  urukul,ad9910: print speed metrics
  kasli: add PTB2 (external clock and SYNC)
  kasli: add sync to LUH, HUB, Opticlock
  kasli_tester: urukul0 mmcx clock defunct
  test_ad9910: relax ifc mode read
  tests: add Urukul-AD9910 HITL unittests including SYNC
  ad9910: add init bit explanation
  test: add Urukul CPLD HITL tests
  ad9910: fiducial timestamp for tracking phase mode
  ad9910: add phase modes
  ad9910: fix pll timeout loop
  tester: add urukul sync
  ptb: back out urukul-sync
  ad9910: add IO_UPDATE alignment and tuning
  urukul: set up sync_in generator
  ad9910: add io_update alignment measurement
  ...

close #1143
 2018-11-05 19:54:30 +01:00
Robert Jördens 6fb18270a2 urukul: flake8 [nfc] 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:45:24 +01:00
Robert Jördens 832690af9a ad9910: flake8 [nfc] 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:44:51 +01:00
Robert Jördens 6d525e2f9a urukul/ad9910 test: remove unused import 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:40:57 +01:00
Robert Jördens 36c5a7cd04 test_urukul: relax speed 
works fine at < 3µs here but needs <5 µs on buildbot-kasli-tester

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:20 +01:00
Robert Jördens 89fecfab50 urukul,ad9910: print speed metrics 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:18 +01:00
Robert Jördens 32d538f72b kasli: add PTB2 (external clock and SYNC) 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:16 +01:00
Robert Jördens d8a5951a13 kasli: add sync to LUH, HUB, Opticlock 
for #1143, also add missing LUH device db

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:14 +01:00
Robert Jördens 68220c316d kasli_tester: urukul0 mmcx clock defunct 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:11 +01:00
Robert Jördens 89fadab63d test_ad9910: relax ifc mode read 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:08 +01:00
Robert Jördens f522e211ba tests: add Urukul-AD9910 HITL unittests including SYNC 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:06 +01:00
Robert Jördens 9fb850ae75 ad9910: add init bit explanation 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:02 +01:00
Robert Jördens bc04da15c5 test: add Urukul CPLD HITL tests 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:00 +01:00
Robert Jördens 141cc7d99f ad9910: fiducial timestamp for tracking phase mode 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:58 +01:00