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86 Commits

Author SHA1 Message Date
whitequark ec9d40b04f Add LLVM IR generation for function calls. 2015-07-21 13:45:27 +03:00
whitequark 6f11fa6bb1 Add conversion to LLVM IR (except handling of exception handling). 2015-07-21 04:55:01 +03:00
whitequark c6cd318f19 Fix artiq.compiler.ir.BasicBlock.__repr__. 2015-07-19 16:32:33 +03:00
whitequark 2c010b10ee Remove UnaryOp ARTIQ IR instruction; rename BinaryOp to Arith. 
Everything it can express can also be expressed via Arith.
 2015-07-19 11:51:53 +03:00
whitequark ac491fae47 Add LocalAccessValidator. 2015-07-19 11:44:51 +03:00
whitequark f212ec0263 Add a trivial dead code elimination transform. 
Its purpose is to sweep up basic blocks with no predecessors,
which are annoying to handle explicitly elsewhere.
 2015-07-19 10:29:14 +03:00
whitequark 603d49dffa Add a dominator analysis. 2015-07-18 20:48:52 +03:00
whitequark 224a93fde3 Make compiler.ir.BasicBlock.predecessors much faster. 2015-07-18 20:48:11 +03:00
whitequark 8e1cc8d985 Add an explicit ARTIQ IR instruction to create a closure. 2015-07-18 09:27:34 +03:00
whitequark 5ad02d5282 Fix ARTIQ IR generation for variables declared global. 2015-07-18 09:10:41 +03:00
whitequark dde2e67c3f Add source locations to ARTIQ IR instructions. 2015-07-18 07:49:42 +03:00
whitequark e96bc3c36c Add complete IR generator. 2015-07-17 21:29:06 +03:00
whitequark 9ff9f85f19 Add accessors to instructions. 2015-07-14 22:18:38 +03:00
whitequark bdcb24108b Add basic IR generator. 2015-07-14 08:56:51 +03:00
whitequark ebe243f8d9 Add printing of SSA functions. 2015-07-13 21:08:20 +03:00
whitequark dbdd45acc5 Add missing return. 2015-07-13 20:52:55 +03:00
whitequark 7c9afcce85 Fix Python default argument fiasco. 2015-07-13 20:52:48 +03:00
whitequark 7c52910dc5 Add a basic SSA IR. 2015-07-11 18:46:37 +03:00
Sebastien Bourdeauducq a647e1104d compiler: split into transforms and py2llvm 2014-09-05 22:18:31 +08:00
Sebastien Bourdeauducq 4915b4b5aa PEP8 2014-09-05 12:03:22 +08:00
Sebastien Bourdeauducq a861226409 compiler/ir: fraction normalization 2014-08-28 17:24:33 +08:00
Sebastien Bourdeauducq 0832507c26 compiler/ir: refactor SSA/alloca management 2014-08-19 17:52:05 +08:00
Sebastien Bourdeauducq e1cdec8c07 compiler/ir: fix compile_function call 2014-08-18 21:32:52 +08:00
Sebastien Bourdeauducq fc9cf67069 compiler/ir: use new infrastructure 2014-08-18 14:34:14 +08:00
Sebastien Bourdeauducq 9cbf31153a compiler/ir: compile fractions with denominator==1 as integers 2014-08-13 17:58:48 +08:00
Sebastien Bourdeauducq b2bb837d22 compiler/ir: add binary AND and OR 2014-07-23 17:10:12 -06:00
Sebastien Bourdeauducq d922c3db7e compiler/ir: replace quantities with their integer value 2014-07-23 11:48:43 -06:00
Sebastien Bourdeauducq 1b52941381 compiler/ir: support shifts 2014-07-23 11:48:15 -06:00
Sebastien Bourdeauducq a9b96cefbe compiler/ir: support AugAssign 2014-07-16 09:43:46 -06:00
Sebastien Bourdeauducq e0ac1193c6 compiler/ir: support function calls in expressions 2014-07-06 21:06:01 +02:00
Sebastien Bourdeauducq a8ef4d8b91 compiler/ir: create machine code from kernel statements 2014-07-05 22:44:54 +02:00
Sebastien Bourdeauducq 99c99484ae compiler/ir: load into device 2014-07-05 19:38:45 +02:00
Sebastien Bourdeauducq 711be75c35 compiler/ir: pass arguments to syscall 2014-07-05 19:13:05 +02:00
Sebastien Bourdeauducq 71323fb7cd compiler: system calls 2014-07-04 17:17:01 +02:00
Sebastien Bourdeauducq 6ea0430cec compiler/ir: simplify type dictionaries 2014-06-22 00:04:46 +02:00
Sebastien Bourdeauducq 9e8077b873 First simple attempt at compiling Python AST to LLVM IR 2014-06-07 18:47:06 +02:00