Commit Graph

7 Commits

Author SHA1 Message Date
Robert Jördens 56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
Robert Jördens 74c0b4452b suservo: clkout and sdo[b-d] are inverted 2018-05-14 12:26:49 +00:00
Robert Jördens 307cd07b9d suservo: lots of gateware/ runtime changes
tested/validated:

* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback

individual changes below:

suservo: correct rtio readback

suservo: example, device_db [wip]

suservo: change rtio channel layout

suservo: mem ports in rio domain

suservo: sck clocked from rio_phy

suservo: cleanup, straighten out timing

suservo: dds cs polarity

suservo: simplify pipeline

suservo: drop unused eem names

suservo: decouple adc SR from IIR

suservo: expand coredevice layer

suservo: start the correct stage

suservo: actually load ctrl

suservo: refactor/tweak adc timing

suservo: implement cpld and dds init
2018-04-27 13:50:26 +02:00
Robert Jördens c304b6207a suservo: drop adc idelays 2018-04-25 14:59:50 +00:00
Robert Jördens b44d6517d1 suservo: use 125 MHz SDR ADC
* easier timing
* natural sampling on rising edge
* timing, signal robustness
* adjust the servo iteration timing
2018-04-25 14:32:23 +00:00
Robert Jördens 37c186a0fc suservo: refactor, constrain
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
2018-04-25 13:44:52 +00:00
Robert Jördens 4c1e356f67 suservo: add pads rewiring layer for eems 2018-04-23 18:30:18 +00:00