Sebastien Bourdeauducq
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2edf65f57b
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drtio: fix satellite minimum_coarse_timestamp clock domain (#947)
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2018-03-13 00:20:57 +08:00 |
Sebastien Bourdeauducq
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1d081ed6c2
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drtio: print diagnostic info on satellite write underflow (#947)
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2018-03-12 23:41:19 +08:00 |
Sebastien Bourdeauducq
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3fbcf5f303
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drtio: remove TSC correction (#40)
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2018-03-09 10:36:17 +08:00 |
Sebastien Bourdeauducq
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e38187c760
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drtio: increase default underflow margin. Closes #947
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2018-03-09 00:49:24 +08:00 |
Sebastien Bourdeauducq
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8bd15d36c4
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drtio: fix error CSR edge detection (#947)
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2018-03-08 16:28:25 +08:00 |
Sebastien Bourdeauducq
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916197c4d7
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siphaser: cleanup
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2018-03-07 11:15:44 +08:00 |
Sebastien Bourdeauducq
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f7aba6b570
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siphaser: fix phase_shift_done CSR
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2018-03-07 10:57:30 +08:00 |
Sebastien Bourdeauducq
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acfd9db185
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siphaser: minor cleanup
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2018-03-07 10:57:30 +08:00 |
Sebastien Bourdeauducq
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7d98864b31
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sayma: enable siphaser
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2018-03-07 10:57:30 +08:00 |
Sebastien Bourdeauducq
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c34d00cbc9
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drtio: implement Si5324 phaser gateware and partial firmware support
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2018-03-07 10:57:30 +08:00 |
Florent Kermarrec
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5b3d6d57e2
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drtio/gth: power down rx on restart (seems to make link initialization reliable)
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2018-03-06 11:49:28 +01:00 |
Florent Kermarrec
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64b05f07bb
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drtio/gth: use parameters from Xilinx transceiver wizard
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2018-03-06 11:02:15 +01:00 |
Florent Kermarrec
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45f1e5a70e
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drtio/gth: cleanup import
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2018-03-06 10:56:07 +01:00 |
Sebastien Bourdeauducq
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6aaa8bf9d9
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drtio: fix link error generation
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2018-03-04 23:20:13 +08:00 |
Sebastien Bourdeauducq
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928d5dc9b3
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drtio: raise RTIOLinkError if operation fails due to link lost (#942)
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2018-03-04 01:02:53 +08:00 |
Florent Kermarrec
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2896dc619b
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drtio/transceiver/gth: fix multilane
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2018-02-28 14:15:40 +01:00 |
Florent Kermarrec
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1f0d955ce4
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drtio/transceiver/gtp: implement tx multi lane phase alignment sequence
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2018-02-27 12:32:25 +01:00 |
Florent Kermarrec
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5b0f9cc6fd
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drtio/transceiver/gth: fix single transceiver case
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2018-02-23 12:15:47 +01:00 |
Florent Kermarrec
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b4ba71c7a4
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drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...)
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2018-02-23 08:37:05 +01:00 |
Florent Kermarrec
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820c834251
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drtio/transceiver/gth: implement tx multi lane phase alignment sequence
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2018-02-22 22:14:15 +01:00 |
Sebastien Bourdeauducq
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fa0d929b4d
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drtio: reorganize RX synchronizers
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2018-02-22 15:21:23 +08:00 |
Sebastien Bourdeauducq
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f060d6e1b3
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drtio: increase A7 clock aligner check period
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2018-02-20 18:50:35 +08:00 |
Sebastien Bourdeauducq
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f15b4bdde7
|
style
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2018-02-20 18:47:59 +08:00 |
Sebastien Bourdeauducq
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ad2c9590d0
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drtio: rewrite/fix reset and link bringup/teardown
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2018-02-20 17:26:43 +08:00 |
Sebastien Bourdeauducq
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52049cf36a
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drtio: add Xilinx RX synchronizer
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2018-02-19 17:49:43 +08:00 |
Florent Kermarrec
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f5831af535
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drtio/transceiver/gtp_7series_init: don't reset gtp rx on power down
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2018-02-19 10:03:19 +01:00 |
Florent Kermarrec
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89a158c0c9
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drtio/transceiver/gtp_7series_init: remove dead code
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2018-02-19 10:02:23 +01:00 |
Florent Kermarrec
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782051f474
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drtio/transceiver/gtp_7series_init: add no retiming on gtp resets
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2018-02-19 09:59:50 +01:00 |
Sebastien Bourdeauducq
|
94c20dfd4d
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drtio: fix misleading GenericRXSynchronizer comment
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2018-02-19 00:47:54 +08:00 |
Sebastien Bourdeauducq
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83abdd283a
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drtio: signal stable clock input to transceiver
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2018-02-18 22:29:30 +08:00 |
Florent Kermarrec
|
bfdda340fd
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drtio/transceiver/gtp_7series: use parameters from xilinx wizard
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2018-02-13 00:23:59 +01:00 |
Florent Kermarrec
|
180c28551d
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drtio/gateware/transceiver/gtp_7series: add power down state before reset on rx (seems to make restart reliable)
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2018-02-09 20:17:02 +01:00 |
Sebastien Bourdeauducq
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d6157514c7
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gtp_7series: flexible QPLL channel selection
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2018-01-23 12:03:09 +08:00 |
Sebastien Bourdeauducq
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98a5607634
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gtp_7series: set clock muxes correctly for second QPLL channel
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2018-01-23 10:39:20 +08:00 |
Sebastien Bourdeauducq
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25fee1a0bb
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gtp_7series: use QPLL second channel
|
2018-01-23 10:15:49 +08:00 |
Sebastien Bourdeauducq
|
626075cbc1
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gtp_7series: simplify TX clocking
|
2018-01-23 09:49:23 +08:00 |
Sebastien Bourdeauducq
|
401e57d41c
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gtp_7series: fix nchannels assert
|
2018-01-23 01:28:01 +08:00 |
Sebastien Bourdeauducq
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5198c224a2
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sayma,kasli: use new pin names
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2018-01-22 11:51:07 +08:00 |
Florent Kermarrec
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d27727968c
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add artix7 gtp (3gbps), share clock aligner with gth_ultrascale
|
2018-01-19 12:17:54 +01:00 |
Sebastien Bourdeauducq
|
dc593ec0f0
|
Merge branch 'rtio-sed' into sed-merge
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2018-01-10 12:04:54 +08:00 |
Sebastien Bourdeauducq
|
6e0288e568
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drtio: fix GTH CPLL reset
|
2017-12-30 12:14:36 +08:00 |
Sebastien Bourdeauducq
|
8153cfa88f
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drtio/gth: add probes on {tx,rx}_init.done
|
2017-12-28 16:49:08 +08:00 |
Sebastien Bourdeauducq
|
c086149782
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drtio/gth: use async microscope probes
|
2017-12-28 16:37:40 +08:00 |
Sebastien Bourdeauducq
|
6801921fc0
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drtio: instrument GTH transceiver
|
2017-12-28 15:03:14 +08:00 |
Sebastien Bourdeauducq
|
f8c8f3fe26
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drtio: fix GTH clock domains
|
2017-12-23 07:21:44 +08:00 |
Sebastien Bourdeauducq
|
c57b66497c
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drtio: refactor/simplify GTH, use migen
|
2017-12-23 01:19:44 +08:00 |
Sebastien Bourdeauducq
|
77897228ca
|
drtio: add GTH transceiver code from Florent (197c79d47)
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2017-12-22 18:01:28 +08:00 |
Sebastien Bourdeauducq
|
ebdbaaad32
|
drtio: remove KC705/GTX support
|
2017-12-22 17:51:42 +08:00 |
Sebastien Bourdeauducq
|
6c049ad40c
|
rtio: report channel numbers in asynchronous errors
|
2017-09-29 16:32:57 +08:00 |
Sebastien Bourdeauducq
|
5437f0e3e3
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rtio: make sequence errors consistently asychronous
|
2017-09-29 14:40:06 +08:00 |