M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 1
Code Issues Projects Releases Wiki Activity
7,993 Commits 18 Branches 34 Tags 36 MiB
Commit Graph

935 Commits

Author SHA1 Message Date
spaqin 232f28c0e8 kern_hw: fix return type 2022-03-04 15:16:14 +08:00
spaqin 51fa1b5e5e drtio: fix i2c switch 2022-03-04 15:16:14 +08:00
Spaqin a85b4d5f5e
I2C API for PCA9547 support (#1860) 2022-03-01 15:07:53 +08:00
Sebastien Bourdeauducq 0da7b83176 runtime: add nac3 exception symbols 2022-02-23 11:04:53 +08:00
David Nadlinger e45cb217be firmware: Explicitly use wrapping integer math in PRNGs 
Patch by Hannah McLaughlin; apparently, the overflow actually
doesn't get checked/reported without `opt-level = 2` and
`lto = "thin"`.
 2022-02-03 23:57:17 +00:00
Steve Fan 34008b7a21
Backport of "fixes alignment and size problem" from artiq-zynq (#1841) 2022-01-28 20:49:55 +08:00
pca006132 4132c450a5 firmware: runtime changes for exception 
Ported from:
M-Labs/artiq-zynq#162

This includes new API for exception handling, some refactoring to avoid
code duplication for exception structures, and modified protocols to
send nested exceptions and avoid string allocation.
 2022-01-26 07:16:54 +08:00
Sebastien Bourdeauducq 4e3e0d129c firmware: fix compilation warning 2022-01-11 09:31:26 +08:00
pca006132 12ee326fb4 firmware: fixed personality function 2022-01-11 09:30:19 +08:00
Steve Fan 4a6bea479a
Host report for async error upon kernel termination (#1791) 
Closes #1644
 2021-12-04 13:33:24 +08:00
mwojcik f281112779 satman: add 100mhz si5324 settings 
siphaser: add calculated vco for 100mhz comment
 2021-12-03 17:19:11 +08:00
occheung 9423428bb0 drtio: fix crc32 offset address 2021-11-24 12:00:56 +08:00
occheung db3e5e83e6 bump misoc 2021-11-08 16:59:08 +08:00
occheung 531670d6c5 dyld: check ABI 2021-11-08 16:59:08 +08:00
occheung 03b803e764 firmware: adjust csr separation 2021-11-08 16:59:08 +08:00
occheung b3e315e24a rust: find json file using CARGO_TRIPLE 2021-11-08 16:59:08 +08:00
occheung 0898e101e2 board_misoc: reuse riscv dir for comm & kernel 2021-11-08 16:59:08 +08:00
Spaqin 69cddc6b86
rtio_clocking: add warnings for unsupported rtio_clock settings (#1773) 2021-10-28 16:34:22 +08:00
Spaqin 9b1d7e297d
runtime: clock input specification improvements 
closes #1735
 2021-10-28 16:21:51 +08:00
occheung d5fa3d131a cargo.lock: update libc version for libfringe 2021-10-16 17:42:24 +08:00
occheung 6d3164a912 riscv: print mtval on panic 2021-10-16 17:42:24 +08:00
occheung 46326716fd runtime: bump libfringe, impl ecall abi 
See libfringe PR: M-Labs/libfringe#1
 2021-10-16 17:42:24 +08:00
occheung 0a59c889de satman/kern: init locked PMP on startup 2021-10-16 17:42:24 +08:00
occheung 27a7a96626 runtime: setup pmp + transfer to user 2021-10-16 17:42:24 +08:00
occheung a0bf11b465 riscv: impl pmp 2021-10-16 17:42:24 +08:00
occheung 790a20edf6 linker: generate stack guard + symbol 2021-10-16 17:42:24 +08:00
Sebastien Bourdeauducq 35d21c98d3 Revert "runtime: expose rint from libm" 
Consistency with NAR3/Zynq where rint is not available.

This reverts commit f5100702f6.
 2021-10-11 08:12:04 +08:00
Sebastien Bourdeauducq f5100702f6 runtime: expose rint from libm 2021-10-10 20:40:17 +08:00
occheung 59065c4663 alloc_list: support alloc w/ large align 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-10-07 12:38:03 +08:00
Sebastien Bourdeauducq 2d79d824f9 firmware: remove minor or1k leftovers 2021-09-12 20:03:37 +08:00
occheung a573dcf3f9 board_misoc/build: use rv32 as target arg 
The original rv64 argument was only to match the misoc counterpart.
 2021-09-10 14:11:23 +08:00
occheung 448974fe11 runtime/main: cleanup 2021-09-10 13:59:53 +08:00
occheung b091d8cb66 kernel: flush cache before mod_init 
This could be necessary as redirecting instructions from D$ directly to I$ as it seems.
Related: https://github.com/SpinalHDL/VexRiscv/issues/137
 2021-09-10 13:25:12 +08:00
occheung b8ed5a0d91 alloc: fix alignment for riscv32 arch 2021-09-10 13:25:12 +08:00
occheung 2213e7ffac ksupp/rtio/exception: fix timestamp 2021-09-10 13:25:12 +08:00
occheung 09ffd9de1e dma: fix timestamp fetch 2021-09-10 13:25:12 +08:00
occheung c6ba0f3cf4 ksupport: fix dma cslice (ffi) 2021-09-10 13:25:12 +08:00
occheung c812a837ab runtime: enlarge stack size 2021-09-10 13:25:12 +08:00
occheung a596db404d satman: fix cargo xbuild sysroot 2021-09-10 13:25:12 +08:00
occheung 4fab267593 cargo: std dependency hack 2021-09-10 13:25:12 +08:00
occheung dcbd9f905c cargo: use cargo xbuild 2021-09-10 13:25:12 +08:00
occheung 9f6b3f6014 firmware: clarify target triple 
The lack of compressed instruction support can be inferred from the target triple, literally.
 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq 6db7280b09 flake: board package WIP 2021-09-10 13:25:12 +08:00
occheung d8ac429059 dyld: streamline lib.rs 
Only riscv32 is supported anyway, no need to have excessive architecture check.
 2021-09-10 13:25:12 +08:00
occheung 798774192d slave_fpga/bootloader: read in little endian 2021-09-10 13:25:12 +08:00
occheung eecd825d23 firmware: suppress warning 2021-09-10 13:25:12 +08:00
occheung 1da0554a49 pcr: purge 2021-09-10 13:25:12 +08:00
occheung 70507e1b72 Cargo.lock: update 2021-09-10 13:25:12 +08:00
occheung c113cd6bf5 libfringe: bump 2021-09-10 13:25:12 +08:00
occheung 61b0170a12 firmware: purge or1k 2021-09-10 13:25:12 +08:00