68d16fc292
serwb: support single-ended signals
...
Low-speed PHY only.
2018-06-13 21:28:21 +08:00
Florent Kermarrec
53e9e475d0
serwb: transmit zeroes when nothing to transmit (for prbs), improve rx idle detection
2018-06-08 16:10:31 +02:00
Florent Kermarrec
7296a76f18
serwb: move common datapath code to datapath.py, simplify flow control
2018-06-08 12:37:08 +02:00
Florent Kermarrec
e21f14c0b3
serwb/phy: typo (KUSSerdes --> KUSerdes)
2018-05-28 10:41:11 +02:00
Florent Kermarrec
3873d09692
serwb: rewrite high-speed phys by splitting clocking/tx/rx, scrambling is now always enabled.
2018-05-15 23:52:41 +02:00
Florent Kermarrec
f8a9dd930b
serwb/genphy: add device parameter (not used here, but this way all the phys share the same parameters), scrambling is also now always enabled.
2018-05-15 23:51:14 +02:00
Florent Kermarrec
2c627cd061
serwb/scrambler: simplify and set scrambler input data to 0 when sink.stb == 0
2018-05-15 23:49:17 +02:00
Florent Kermarrec
913d1e8e12
serwb: add generic low-speed phy (125Mhz linerate, same phy for ultrascale/7-series)
2018-05-15 16:39:39 +02:00
Florent Kermarrec
520aade8fe
serwb/scrambler: cleanup/fix potential bug
2018-05-15 16:30:52 +02:00
Florent Kermarrec
f5208ff2f3
serwb/core: reduce buffering, use buffered=True
2018-05-12 12:03:58 +02:00
Florent Kermarrec
fdc953e569
serwb/etherbone: recuce buffering
2018-05-12 12:03:11 +02:00
Florent Kermarrec
6e67e6d0b1
serwb: revert some changes (was breaking simulation)
2018-05-12 11:59:46 +02:00
Florent Kermarrec
0a6d4ccd85
serwb/phy: improve/cleanup init
2018-05-12 01:35:34 +02:00
Florent Kermarrec
b6ab59fb80
serwb/phy: increase timeout
2018-05-12 01:32:55 +02:00
Florent Kermarrec
e09dbc89bc
serwb: remove idelaye3 en_vtc (was not done correctly, we'll add direct software control)
2018-05-12 01:32:16 +02:00
Florent Kermarrec
cd4477864a
serwb: fix case when rtm fpga is not loaded, lvds input can be 0 or 1
2018-05-11 23:31:25 +02:00
2e3bf8602f
serwb: reduce buffering. Closes #997
2018-05-11 14:13:41 +08:00
Florent Kermarrec
60fd362d57
serwb: fix rx_comma detection
2018-05-07 23:54:35 +02:00
Florent Kermarrec
64c8eee28d
serwb/phy/master: fix slave ready detection by filtering possible glitches on rx data (seems to happen when RTM fpga is not loaded)
2018-04-30 23:59:56 +02:00
Florent Kermarrec
20ccc9d82f
serwb/core/phy: move scrambler in phy, add link test, revert delay min/max checks
2018-04-17 19:21:21 +02:00
Florent Kermarrec
ebfac36223
serwb/scrambler: dynamic enable/disable
2018-04-17 19:20:06 +02:00
Florent Kermarrec
816a6f2ec7
serwb/phys: remove phy_width (revert linerate to 1Gbps)
2018-04-17 19:19:18 +02:00
Florent Kermarrec
825a2158ba
serwb: add phy_width parameter to allow reducing linerate to 500Mbps or 250Mbps
2018-04-16 23:19:14 +02:00
Florent Kermarrec
9d0e8c27ff
serwb/scrambler: add flow control
2018-04-07 14:51:17 +02:00
Florent Kermarrec
1fd96eb0fd
serwb: replace valid/ready with stb/ack
2018-04-07 03:06:19 +02:00
Florent Kermarrec
c8a08375f8
serwb: replace valid/ready with stb/ack
2018-04-07 03:03:44 +02:00
Florent Kermarrec
73b727cade
serwb: new version using only sys/sys4x clocks domains, scrambling deactivated.
2018-04-07 02:59:14 +02:00
Florent Kermarrec
3248caa184
gateware/serwb: move all clocking outside of serwb, use existing sys/sys4x clocks
2018-04-03 18:48:08 +02:00
Florent Kermarrec
2009734b3c
serwb/phy: get 625Mbps linerate working, increase timeout
2018-01-09 18:54:52 +01:00
Florent Kermarrec
9c6a7f7509
serwb/kusphy: use same serwb_serdes_5x reset than s7phy
2018-01-09 18:54:05 +01:00
Florent Kermarrec
907af25a69
gateware/serwb: add scrambling, reduce cdc fifo depth
2018-01-03 17:34:03 +01:00
Florent Kermarrec
7f4756a869
gateware/serwb: cleanup packet
2018-01-03 17:30:12 +01:00
Florent Kermarrec
f003566e52
serwb: fix rx_delay_inc on ultrascale, this was the issue serwb issue...
...
rx_delay_inc and rx_delay_ce were set for only one cycle, on ultrascale, these signals are translated to serwb_serdes_5x clock domain and we now set rx_delay_inc always to 1 (MultiReg), rx_delay_ce for one cycle (PulseSynchronizer)
2017-11-18 18:01:46 +01:00
Florent Kermarrec
1b976bfa4d
gateware/serwb/kusphy: use AsyncResetSynchronizer on cd_serwb_serdes_5x
2017-11-18 17:57:11 +01:00
Florent Kermarrec
48bfaec8d3
gateware/serwb/phy: remove unnecessary rx_dly_rst (use wrap-around), fix typo & pep8
2017-11-10 10:37:08 +01:00
Florent Kermarrec
59be095512
gateware/serwb/kusphy: use locally inverted clk_b on iserdese3
2017-11-10 10:35:48 +01:00
Florent Kermarrec
db82b11f29
gateware/serwb/core: cleanup and increase fifo depth
2017-11-10 10:33:39 +01:00
Florent Kermarrec
5bd1e43ced
gateware/serwb: cleanup imports, use buffered SyncFIFO in EtherboneRecordSender
2017-11-03 12:15:14 +01:00
Florent Kermarrec
660f9856ec
gateware/serwb: add test for phy initialization
2017-08-30 17:59:10 +02:00
Florent Kermarrec
9650233007
gateware/serwb: change serdes clock domain to serwb_serdes
2017-08-30 15:44:44 +02:00
Florent Kermarrec
41d57d64f6
gateware/serwb: SERWBPLL, SERWBPHY, SERWBCore and add checks in delay finding to verify the sampling window
2017-08-30 14:40:11 +02:00
Florent Kermarrec
7d7f6be7ce
gateware/serwb: generate wishbone error if link loose ready in the middle of a transaction
2017-08-29 16:41:29 +02:00
Florent Kermarrec
60ad36e7d6
gateware/serwb: generate wishbone error on wishbone slave when access while link is not ready
2017-08-29 13:43:26 +02:00
Florent Kermarrec
89558e2653
gateware/serwb: for the initial version set delay in the center of the valid sampling window and don't use phase detectors
...
we'll use phase detectors later when it will be working reliably for both artix7 and kintex ultrascale
2017-08-29 13:38:52 +02:00
53c7f92fdc
serwb: add __init__.py and expose submodules
2017-08-21 15:57:43 -04:00
dac3a78b75
serwb: style, use migen, fix imports
2017-08-21 12:35:59 -04:00
Florent Kermarrec
44dc76e42e
Add serial Wishbone bridge
...
Files copied directly from https://github.com/enjoy-digital/sayma_test @ 9ce2cba87896d056819dc2edc54f0453a86162c3
2017-08-21 12:22:05 -04:00
