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Commit Graph

160 Commits

Author SHA1 Message Date
7657cf1264 phaser: bump misoc/migen 2016-11-29 14:55:15 +01:00
41779367b5 phaser: adapt conda recipe 2016-11-24 16:04:13 +01:00
4160490e0a Merge branch 'phaser' into phaser2
* phaser: (23 commits)
  RELEASE_NOTES: update
  pipistrello: add some inputs
  Remove last vestiges of nist_qc1.
  Fully drop AD9858 and kc705-nist_qc1 support (closes #576).
  coredevice.dds: reimplement fully in ARTIQ Python.
  compiler: unbreak casts to int32/int64.
  analyses.constness: fix false positive on x[...].
  inferencer: significantly improve the op-assignment diagnostic.
  Fix tests.
  Move mu_to_seconds, seconds_to_mu to Core.
  artiq_devtool: don't crash on invalid utf-8.
  artiq_devtool: detect a race condition during connect.
  llvm_ir_generator: handle no-op coercions.
  conda: use development version of migen/misoc
  Revert accidentally committed code.
  Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623"
  analyses.invariant_detection: implement (#622).
  Fix whitespace.
  coredevice.dds: work around the round(numpy.float64()) snafu.
  coredevice.dds: update from obsolete int(width=) syntax (fixes #621).
  ...
2016-11-21 17:29:46 +01:00
f7e8961ab0 Merge branch 'master' into phaser
* master: (23 commits)
  RELEASE_NOTES: update
  pipistrello: add some inputs
  Remove last vestiges of nist_qc1.
  Fully drop AD9858 and kc705-nist_qc1 support (closes #576).
  coredevice.dds: reimplement fully in ARTIQ Python.
  compiler: unbreak casts to int32/int64.
  analyses.constness: fix false positive on x[...].
  inferencer: significantly improve the op-assignment diagnostic.
  Fix tests.
  Move mu_to_seconds, seconds_to_mu to Core.
  artiq_devtool: don't crash on invalid utf-8.
  artiq_devtool: detect a race condition during connect.
  llvm_ir_generator: handle no-op coercions.
  conda: use development version of migen/misoc
  Revert accidentally committed code.
  Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623"
  analyses.invariant_detection: implement (#622).
  Fix whitespace.
  coredevice.dds: work around the round(numpy.float64()) snafu.
  coredevice.dds: update from obsolete int(width=) syntax (fixes #621).
  ...
2016-11-21 17:29:39 +01:00
whitequark
6aa5d9f6c6 Remove last vestiges of nist_qc1. 2016-11-21 15:36:22 +00:00
whitequark
5e8888d5f3 Fully drop AD9858 and kc705-nist_qc1 support (closes #576). 2016-11-21 15:14:17 +00:00
eb18466820 conda: use development version of migen/misoc 2016-11-20 22:56:48 +08:00
7664b226f2 phaser/conda: bump jesd204b 2016-11-18 15:34:03 +01:00
aedb6747f2 Merge branch 'master' into phaser
* master: (47 commits)
  runtime: disable the Nagle algorithm entirely.
  runtime: buffer RPC send packets.
  runtime: don't print debug messages to the UART.
  runtime: print microsecond timestamps in debug messages.
  artiq_devtool: abort if build failed.
  conda: bump llvmlite-artiq dep.
  conda: bump llvmlite-artiq dep.
  llvm_ir_generator: use !{→unconditionally.}invariant.load metadata.
  artiq_devtool: more robust port forwarding.
  setup: remove paramiko dependency (optional and developer-only)
  artiq_devtool: implement.
  artiq_compile: actually disable attribute writeback.
  conda: use pythonparser 1.0.
  conda: tighten pythonparser dependency (fixes #600).
  doc: clarify kernel_invariant doc (fixes #609).
  compiler: Emit all-kernel_invariant objects as LLVM constants
  conda: update for LLVM 3.9.
  add has_dds, use config flags
  Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""
  Revert "Revert "Revert "Update for LLVM 3.9."""
  ...
2016-11-13 16:54:28 +01:00
whitequark
7c2b1155ef conda: bump llvmlite-artiq dep. 2016-11-12 13:58:00 +00:00
whitequark
5eb940deb7 conda: bump llvmlite-artiq dep. 2016-11-12 04:09:34 +00:00
whitequark
67e743d74a conda: use pythonparser 1.0. 2016-11-09 15:19:27 +00:00
whitequark
71f1d38860 conda: tighten pythonparser dependency (fixes #600). 2016-11-09 15:10:53 +00:00
whitequark
124b257e05 conda: update for LLVM 3.9. 2016-11-08 23:24:03 +00:00
whitequark
ec8fe6f8bd Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""
This reverts commit 7b81ed1d18.
2016-11-08 14:22:47 +00:00
whitequark
7b81ed1d18 Revert "Revert "Revert "Update for LLVM 3.9."""
This reverts commit 0d7688017b.
2016-11-08 12:58:20 +00:00
whitequark
0d7688017b Revert "Revert "Update for LLVM 3.9.""
This reverts commit 5f5975844a.
2016-11-08 11:59:16 +00:00
6d07a16c62 Merge branch 'master' into phaser
* master: (72 commits)
  gateware: extend mailbox to 3 entries.
  master/worker_db: set default value for archive
  master: keep dataset manager consistent when set_dataset is called with contradictory attributes
  master: archive input datasets. Closes #587
  master: ensure same dataset is in broadcast and local when mutating
  scheduler: default submission arguments, closes #577
  pdq2: sync with pdq2
  doc: clarify usage of pause/check_pause, closes #571
  dashboard/datasets: use scientific spinbox and increase number of decimals, closes #572
  gateware/spi: fix import
  runtime: fix use of $(realpath) in Makefile.
  test: fix printf specifier.
  llvm_ir_generator: make sure RPC allocations are not underaligned.
  runtime: use i64 for watchdog timeout, not i32.
  runtime: port ksupport to Rust.
  runtime: remove some redundant libm functions copied inline.
  language: Add "A" (ampere) as well-known unit for arguments
  conda: misoc 0.4 (csr)
  runtime: cap log level at debug.
  runtime: discard unnecessary sections.
  ...
2016-10-28 01:40:11 +02:00
062aca2a6b conda/phaser: build-depend on jesd204b 2016-10-19 14:44:54 +02:00
81511feab8 phaser: README: specify versions 2016-10-12 17:13:06 +02:00
290498aca0 conda: misoc 0.4 (csr) 2016-10-12 16:34:19 +02:00
4a0eaf0f95 phaser: add jesd204b rtio dds
gateware: add jesd204b awg

gateware: copy phaser (df3825a)
dsp/tools: update satadd mixin
phaser: no DDS stubs
dsp: accu fix
phaser: cleanup/reduce

sawg: kernel support and docs

sawg: coredevice api fixes

sawg: example ddb/experiment

phaser: add conda package

examples/phaser: typo

sawg: adapt tests, fix accu stb

sawg: tweak dds parameters

sawg: move/adapt/extend tests

sawg: test phy, refactor

phaser: non-rtio spi

phaser: target cli update

phaser: ad9154-fmc-ebz pins

phaser: reorganize fmc signal naming

phaser: add test mode stubs

phaser: txen is LVTTL

phaser: clk spi xfer test

phaser: spi for ad9154 and ad9516

phaser: spi tweaks

ad9154: add register map from ad9144.xml

ad9516: add register map from ad9517.xml and manual adaptation

ad9154_reg: just generate getter/setter macros as well

ad9154: reg WIP

ad9154: check and fix registers

kc705: single ended rtio_external_clk

use single ended user_sma_clk_n instead of p/n to free up one clock sma

kc705: mirror clk200 at user_sma_clock_p

ad9516_regs.h: fix B_COUNTER_MSB

phase: wire up clocking differently

needs patched misoc

kc705: feed rtio_external_clock directly

kc705: remove rtio_external_clk for phaser

phaser: spi tweaks

ad9516: some startup

ad9516_reg fixes

phaser: setup ad9516 for supposed 500 MHz operation

ad9516: use full duplex spi

ad9154_reg: add CONFIG_REG_2

ad9154_reg: fixes

phaser: write some ad9154 config

ad9154_reg: fixes

ad9154: more init, and human readable setup

ad9154/ad9516: merge spi support

ad9154: status readout

Revert "kc705: remove rtio_external_clk for phaser"

This reverts commit d500288bb44f2bf2eeb0c2f237aa207b0a8b1366.

Revert "kc705: feed rtio_external_clock directly"

This reverts commit 8dc7825519e3e75b7d3d29c9abf10fc6e3a8b4c5.

Revert "phase: wire up clocking differently"

This reverts commit ad9cc450ffa35abb54b0842d56f6cf6c53c6fbcc.

Revert "kc705: mirror clk200 at user_sma_clock_p"

This reverts commit 7f0dffdcdd28e648af84725682f82ec6e5642eba.

Revert "kc705: single ended rtio_external_clk"

This reverts commit a9426d983fbf5c1cb768da8f1da26d9b7335e9cf.

ad9516: 2000 MHz clock

phaser: test clock dist

phaser: test freqs

ad9154: iostandards

phaser: drop clock monitor

phaser: no separate i2c

phaser: drive rtio from refclk, wire up sysref

phaser: ttl channel for sync

ad9154: 4x interp, status, tweaks

phaser: sync/sysref 33V banks

phaser: sync/sysref LVDS_25 inputs are VCCO tolerant

phaser: user input-only ttls

phaser: rtio fully from refclk

ad9154: reg name usage fix

ad9154: check register modifications

Revert "ad9154: check register modifications"

This reverts commit 45121d90edf89f7bd8703503f9f317ad050f9564.

ad9154: fix status code

ad9154: addrinc, recal serdes pll

phaser: coredevice, example tweaks

sawg: missing import

sawg: type fixes

ad9514: move setup functions

ad9154: msb first also decreasing addr

phaser: use sys4x for rtio internal ref

phaser: move init code to main

phaser: naming cleanup

phaser: cleanup pins

phaser: move spi to kernel cpu

phaser: kernel support for ad9154 spi

ad9154: add r/w methods

ad9154: need return annotations

ad9154: r/w methods are kernels

ad9154_reg: portable helpers

phaser: cleanup startup kernel

ad9154: status test

ad9154: prbs test

ad9154: move setup, document

phaser: more documentation
2016-10-05 16:17:50 +02:00
2701b914e2 conda: update migen version requirements 2016-09-24 21:02:19 +08:00
5b713ea385 conda: fix nist_clock summary 2016-09-02 19:06:36 +02:00
91b59cd584 conda: misoc 0.3 2016-08-26 14:01:00 +02:00
0a4d4e30ef doc: use sphinx_rtd_theme 2016-08-25 21:52:46 +02:00
60919c2ea7 doc: use wavedrom to visualize stuff 2016-08-25 12:17:05 +02:00
whitequark
4c6cad2977 Add a Rust component in the runtime. 2016-08-17 09:07:19 +00:00
whitequark
6c2ca69d4f conda: require misoc 0.2. 2016-08-16 07:08:35 +00:00
whitequark
5f5975844a Revert "Update for LLVM 3.9."
This reverts commit 3aa7b99b8f.
2016-08-13 04:43:19 +00:00
whitequark
3aa7b99b8f Update for LLVM 3.9. 2016-08-13 03:28:04 +00:00
c065b5866f require Python 3.5.2, remove monkey patches 2016-07-07 14:55:21 +08:00
4e241f10c5 conda: try lowercase package name 2016-06-19 09:59:42 +08:00
b97ad69135 conda: install lit and OutputCheck 2016-06-19 09:58:02 +08:00
6500d3fc63 conda: use setuptools entry_points
Conda entry_points doesn't support gui_scripts
2016-06-19 09:31:23 +08:00
4d6f53ce67 conda: obviously, platform-specific dependencies are broken 2016-05-27 22:45:01 -05:00
16063ff8fb conda: another attempt at platform-specific dependencies 2016-05-27 22:25:19 -05:00
8c1f1d8f2a rpctool: make readline optional, add to conda dependencies. Closes #442 2016-05-25 11:11:59 -05:00
6686383378 artiq_browser: add entry points 2016-04-05 17:22:16 +08:00
ed1c368e73 gateware: name targets consistently. Closes #290 2016-04-05 16:07:29 +08:00
whitequark
e908a5fceb conda: update llvmlite-artiq dependency.
Build 24 includes addc optimizations.
2016-04-05 00:48:41 +00:00
7453d85d5e GUI -> dashboard 2016-04-04 22:12:45 +08:00
whitequark
ce30045dd4 conda: update llvmlite-artiq dependency.
Build 22 includes debug information support.
2016-04-02 18:40:06 +00:00
whitequark
6a34a75b99 conda: require llvmlite-artiq built for LLVM 3.8. 2016-04-01 09:35:28 +00:00
whitequark
2c04979727 compiler: update for LLVM 3.7. 2016-03-31 11:23:47 +00:00
d9e9b66494 depend on asyncserial 2016-03-22 21:56:09 +08:00
129927490b conda: pyqt -> pyqt5 2016-02-21 17:14:59 +08:00
whitequark
1cfca74fcb conda: remove spurious artiq dep from gateware packages. 2016-02-14 13:35:40 +00:00
734fa593e4 conda bitstreams: depend on artiq 0.1 2016-02-14 14:21:31 +01:00
ed36a96f8f conda/artiq: pyqt (not 5, to be revisited) 2016-02-14 02:24:46 +01:00