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556 Commits

Author SHA1 Message Date
whitequark b29e2d5bfe Globally update UART baudrate to 921600. 2017-01-24 22:25:58 +00:00
whitequark 527b1e986c firmware: integrate smoltcp instead of lwip. 2017-01-23 13:59:34 +00:00
Sebastien Bourdeauducq 28a41a2f60 gateware: fix aeb1ba847 2017-01-18 17:11:02 -06:00
Sebastien Bourdeauducq 2a7a8f91ca gateware: fix import 2017-01-18 16:51:30 -06:00
Sebastien Bourdeauducq ce31ffddb0 firmware: add satellite manager 
The code duplication with the runtime should be cleaned up later.
 2017-01-18 16:50:32 -06:00
Sebastien Bourdeauducq b40953800a gateware: soc -> amp.soc 2017-01-18 15:28:14 -06:00
Sebastien Bourdeauducq aeb1ba8471 gateware: use default MiSoC timer 2017-01-18 15:22:33 -06:00
Sebastien Bourdeauducq b8d89d56b1 drtio: add GenericRXSynchronizer 2017-01-15 13:44:43 -06:00
Sebastien Bourdeauducq 0edffb54c2 drtio: fix packet truncation detection in RTPacketSatellite 2017-01-13 09:29:22 -06:00
Sebastien Bourdeauducq 6805feb494 drtio: report truncated packets 2017-01-12 23:44:45 -06:00
Sebastien Bourdeauducq 7c699e2f80 drtio: add FIFO space request count debug API 2017-01-11 13:48:14 -06:00
Sebastien Bourdeauducq c25186fae1 drtio: print packet error descriptions in log 2017-01-10 18:03:01 -06:00
Sebastien Bourdeauducq 98598df78e rtio: keep retrying on get FIFO space timeout 2017-01-10 16:12:32 -06:00
Sebastien Bourdeauducq e624f45369 drtio: remove FIFO empty local detection optimization 
It optimizes a marginal case, it is difficult to get right
(need to know the size of the FIFO for each channel), and
it adds complexity and potential bug sources.
 2017-01-10 14:31:46 -06:00
Sebastien Bourdeauducq f75fffcf96 drtio: fix satellite RX data corruption 2017-01-10 14:29:30 -06:00
Sebastien Bourdeauducq fe53bab953 targets: kc705 -> kc705_dds 2017-01-05 18:40:56 +01:00
Sebastien Bourdeauducq 082fdaf450 move i2c to libboard, do bit-banging on comms CPU 2017-01-04 21:04:38 +01:00
Sebastien Bourdeauducq 86f6b391b7 ad9xxx -> ad9_dds 2017-01-04 11:34:52 +01:00
Sebastien Bourdeauducq c08fc8aae9 firmware: support moninj without DDS. Closes #650 2017-01-04 11:26:02 +01:00
Sebastien Bourdeauducq 455250b3f9 remove DDS_AD9914 and DDS_ONEHOT_SEL 2017-01-03 22:04:25 +01:00
Sebastien Bourdeauducq fbf5a4d4a2 Merge branch 'phaser2-rust-init' 2017-01-03 21:31:21 +01:00
Robert Jördens 9a80b8d533 spi: fix xfers with full data_width (closes #615) 
misoc 15000af43611bbe8be13cb2b016e408f043202cd
 2017-01-03 19:51:14 +01:00
Sebastien Bourdeauducq 7ff77bceac move AD9616 and AD9154 initialization to firmware 2017-01-03 16:11:38 +01:00
Sebastien Bourdeauducq 417708af90 phaser: add note about DDS defines (#650) 2017-01-02 22:15:21 +01:00
Robert Jördens f5f662200b fir: streamline, optimize DSP extraction, left-align inputs 2016-12-20 21:39:51 +01:00
Robert Jördens cfb66117af fir: size hint for pre-adder 2016-12-20 17:58:06 +01:00
Robert Jördens f310274e39 fir: cleanup halfgen4 2016-12-20 17:58:06 +01:00
Sebastien Bourdeauducq 6b998581cc rtio: use same reset for counter_rtio whatever the interface delay is 2016-12-15 09:28:13 +08:00
Robert Jördens 115ea67860 fir: automatically use transposed topology 2016-12-14 19:16:07 +01:00
Robert Jördens a451b675c9 Revert "fir: different adder layout" 
This reverts commit 6f50e77b409c293c1905f28e69d79403a0803866.
 2016-12-14 19:16:07 +01:00
Robert Jördens 93076b8efa fir: different adder layout 2016-12-14 19:16:07 +01:00
Robert Jördens 61abd994e9 Revert "fir: force dsp48" 
This reverts commit 0ad433832d1b6dcd803ffa086ae73b2ee0568326.
 2016-12-14 19:16:07 +01:00
Robert Jördens 641d109786 fir: force dsp48 2016-12-14 19:16:07 +01:00
Robert Jördens 8381db279f sawg: wire up all HBF outputs, latency compensation in phys, simplify 2016-12-14 19:16:07 +01:00
Robert Jördens 6cdb96c5e0 rtio: add support for latency compensation in phy 
* if multiple RTIO channels influence the same data stream and physical
output channel (see SAWG) differential latency needs to be compensated
* this is a NOP for phys with zero delay (default)
* if delay==1, it adds one timestamp-wide register
* if delay >1, it adds one adder and one register
* latency compensation using (~10-50 deep) delay lines is about as
expensive as a single adder+register but very tedious to implement
 2016-12-14 19:16:07 +01:00
Robert Jördens 4c27029be0 sawg: fix limit regs 2016-12-14 19:16:07 +01:00
Sebastien Bourdeauducq e9592105ce drtio: fix aux controller clock domain mistakes 2016-12-14 10:16:45 +08:00
Sebastien Bourdeauducq 527757b471 kc705_drtio: use ad9154_fmc_ebz 2016-12-13 14:30:26 +08:00
Sebastien Bourdeauducq 3b5abae935 drtio: fix clock domain conflict 2016-12-13 14:19:49 +08:00
Robert Jördens 03d13d3811 phaser: dma/drtio changes 2016-12-12 17:46:36 +01:00
Robert Jördens c63fa46430 Merge branch 'phaser2' 
* phaser2: (157 commits)
  sawg/hbf: tweak pipeline for timing
  fir: register multiplier output
  conda/phaser: build-depend on numpy
  sawg: reduce coefficient width
  sawg: fix latency
  test/fir: needs mpl. don't run by default
  test/sawg: patch spline
  sawg: use ParallelHBFCascade to AA [WIP]
  fir: add ParallelHBFCascade
  fir: add ParallelFIR and test
  gateware/dsp: add FIR and test
  README_PHASER: update
  sawg: documentation
  sawg: extract spline
  sawg: document
  sawg: demo_2tone
  sawg: round to int64
  gateware/phaser -> gateware/ad9154_fmc_ebz
  phaser: fix typo
  sawg: merge set/set64
  ...
 2016-12-12 17:31:39 +01:00
Sebastien Bourdeauducq 4b61020b27 drtio: reset more local state 2016-12-12 18:48:10 +08:00
Sebastien Bourdeauducq d99e64effd drtio: clear any stale FIFO space reply 2016-12-12 18:02:56 +08:00
Sebastien Bourdeauducq 4c59c0fecf Revert "drtio: order resets wrt writes" 
This reverts commit 9a048c2b3a.
 2016-12-12 17:49:07 +08:00
Sebastien Bourdeauducq 8f747fa209 drtio: clear underflow and sequence error on reset 2016-12-12 17:39:14 +08:00
Sebastien Bourdeauducq 7196bc21c1 rtio: simplify error reset logic 
Channel is always selected when reset is issued.
 2016-12-12 17:35:10 +08:00
Sebastien Bourdeauducq 9a048c2b3a drtio: order resets wrt writes 2016-12-12 17:18:07 +08:00
Sebastien Bourdeauducq 0a9f69a3ed kc705_drtio_master: add missing rtio_core CSRs 2016-12-09 19:23:36 +08:00
Sebastien Bourdeauducq bc36bda94a perform RTIO init on comms CPU side 2016-12-09 14:16:55 +08:00
Robert Jördens f6071a5812 sawg/hbf: tweak pipeline for timing 2016-12-08 17:00:53 +01:00
Robert Jördens b7a308d33d fir: register multiplier output 2016-12-08 17:00:39 +01:00
Robert Jördens 18e3f58c22 sawg: reduce coefficient width 2016-12-08 16:14:32 +01:00
Robert Jördens 598da09a93 sawg: fix latency 2016-12-08 15:53:35 +01:00
Robert Jördens 3eef6229cc sawg: use ParallelHBFCascade to AA [WIP] 2016-12-08 15:32:57 +01:00
Robert Jördens a629eb1665 fir: add ParallelHBFCascade 2016-12-08 15:30:26 +01:00
Robert Jördens d303225249 fir: add ParallelFIR and test 2016-12-08 15:21:04 +01:00
Robert Jördens 7e0f3edca5 gateware/dsp: add FIR and test 2016-12-07 19:14:23 +01:00
Sebastien Bourdeauducq 4c3717932e drtio: link layer debugging CSRs 2016-12-07 23:03:14 +08:00
Sebastien Bourdeauducq b311830fc4 kc705: fix drtio_aux address conflict 2016-12-06 18:28:48 +08:00
Sebastien Bourdeauducq 4669d3f02f kc705_drtio_satellite: add MiSoC system, hook up auxiliary controller 2016-12-06 14:56:42 +08:00
Sebastien Bourdeauducq f4b7d39a69 kc705_drtio_master: hook up auxiliary controller 2016-12-06 14:56:15 +08:00
Sebastien Bourdeauducq f3c50a37ca rtio: always read full DMA sequence 2016-12-06 01:05:47 +08:00
Sebastien Bourdeauducq c413d95b49 rtio: fix DMA get_csrs 2016-12-05 18:12:09 +08:00
Sebastien Bourdeauducq b677c69faf rtio: fix handling of o_status in DMA 2016-12-05 18:01:48 +08:00
Sebastien Bourdeauducq 75ea13748a rtio: fix DMA data MSB and stop signaling, self-checking unittest 2016-12-05 18:01:48 +08:00
Sebastien Bourdeauducq a5834765d0 rtio: more DMA fixes, better stopping mechanism 2016-12-05 18:01:48 +08:00
Sebastien Bourdeauducq 30bce5ad35 rtio: DMA fixes 2016-12-05 18:01:48 +08:00
Sebastien Bourdeauducq 88ad054ab6 Merge branch 'drtio' 2016-12-03 23:25:17 +08:00
Sebastien Bourdeauducq 5d145ff912 drtio: add false paths between sys and transceiver clocks 2016-12-03 23:03:01 +08:00
Sebastien Bourdeauducq 4b97b9f8ce drtio: add clock constraints 2016-12-03 22:17:29 +08:00
Robert Jördens e747696aaa Merge remote-tracking branch 'm-labs/phaser2' into phaser2 
* m-labs/phaser2:
  phaser: fix typo
 2016-12-02 14:11:56 +01:00
Robert Jördens cbf1004df3 gateware/phaser -> gateware/ad9154_fmc_ebz 2016-12-02 14:11:41 +01:00
Sebastien Bourdeauducq 6353f6d590 drtio: support different configurations and speeds 2016-12-02 17:22:22 +08:00
Sebastien Bourdeauducq 3cee269afe phaser: fix typo 2016-12-02 11:06:45 +08:00
Sebastien Bourdeauducq 3931d8097b rtio: fix DMA TimeOffset stream.connect 2016-12-01 16:43:46 +08:00
Sebastien Bourdeauducq d4cb1eb998 kc705: integrate DMA 2016-12-01 16:31:00 +08:00
Sebastien Bourdeauducq 7c59688a12 rtio: simple DMA fixes 2016-12-01 16:30:48 +08:00
Sebastien Bourdeauducq 46dbc44c8f rtio: export DMA and CRIInterconnectShared 2016-12-01 16:30:29 +08:00
Sebastien Bourdeauducq 6c97a97d8c rtio: support single-master CRI arbiter 2016-12-01 16:30:11 +08:00
Sebastien Bourdeauducq a318243083 rtio: CRI arbiter (untested) 2016-12-01 15:41:43 +08:00
Sebastien Bourdeauducq cd3f68ba76 rtio: DMA core (untested) 2016-11-30 18:43:19 +08:00
Robert Jördens d8b5eac856 sawg: style 2016-11-29 20:51:40 +01:00
Robert Jördens 27160f5912 phaser: make sysref input only for timing 2016-11-29 15:28:10 +01:00
Sebastien Bourdeauducq cf342eca6e kc705_drtio_master: fix number of fine RTIO timestamp bits 2016-11-29 10:44:27 +08:00
Sebastien Bourdeauducq f4c6d6eb69 kc705_drtio_master: fix number of fine RTIO timestamp bits 2016-11-28 15:18:54 +08:00
Sebastien Bourdeauducq 85f2467e2c rtio: fix RTIO/DRTIO timestamp resolution discrepancy 2016-11-28 15:01:46 +08:00
Sebastien Bourdeauducq 9fdd29ddae drtio: connect KernelInitiator correctly 2016-11-28 14:36:18 +08:00
Sebastien Bourdeauducq 5460202220 drtio: typo 2016-11-28 14:35:21 +08:00
Sebastien Bourdeauducq 4e1b497742 drtio: typo 2016-11-28 14:34:58 +08:00
Sebastien Bourdeauducq c419c422fa drtio: support for local RTIO core 2016-11-28 14:33:26 +08:00
Sebastien Bourdeauducq 046b8bfd33 drtio: fix transmit datapath with transceiver width > max packet width 2016-11-27 13:19:12 +08:00
Sebastien Bourdeauducq 0903964488 drtio: large data fixes 2016-11-27 02:12:50 +08:00
Sebastien Bourdeauducq 8090abef5d drtio: large data support 2016-11-25 17:04:09 +08:00
Robert Jördens 55e37b41ec phaser: use ttl_simple.Input for sync 2016-11-24 15:55:26 +01:00
Robert Jördens 8060652913 phaser: use Inout_8X 2016-11-24 15:21:03 +01:00
Robert Jördens 617650f3b2 phaser: extract target 2016-11-24 15:20:51 +01:00
Robert Jördens 1c84d1ee59 Merge branch 'master' into phaser2 
* master:
  rtio: support differential ttl
  RELEASE_NOTES: int(a, width=b) removal, use int32/64
  pc_rpc: use ProactorEventLoop on Windows (#627)
 2016-11-24 15:05:49 +01:00
Robert Jördens 95c885b580 rtio: support differential ttl 2016-11-24 15:04:12 +01:00
Sebastien Bourdeauducq 7cd27abaa6 drtio: do not reset remote TSC on reset command 2016-11-24 00:09:53 +08:00
Sebastien Bourdeauducq 2d62a89143 rtio: use large data register 2016-11-23 23:23:27 +08:00
Sebastien Bourdeauducq 07f2d84275 drtio: remote resets 2016-11-23 23:19:31 +08:00
Sebastien Bourdeauducq 9941f3557d rtio: use only CRI commands for rio/rio_phy resets 2016-11-23 23:19:14 +08:00
Robert Jördens 347609d765 rtio: auto clear output event data and address 
This is to support channels where variable length
event data is well-defined through zero-padding.
E.g. in the case of `Spline` zero-padding of events naturally
corresponds to low-order knots.

Use timestamp change as trigger. This assumes that writes to the
timestamp register always precede address and data writes.
It does not break support for ganged writes of the same event
timestamp and data/address to multiple channels or
channel-addresses.
 2016-11-23 15:03:36 +01:00
Robert Jördens 32fdacd95a Merge remote-tracking branch 'm-labs/master' into phaser2 
* m-labs/master:
  runtime: don't attempt to perform writeback if disabled in kernel.
  runtime: print trace level log messages to UART during startup.
  runtime: support for targets without RTIO log channel
  runtime: support for targets without I2C
  kc705: remove stale DDS definition
  runtime: show a prompt to erase startup/idle kernels.
 2016-11-23 14:56:29 +01:00
Sebastien Bourdeauducq d400c81cb2 rtio: remove debug print 2016-11-23 13:37:14 +08:00
Sebastien Bourdeauducq 4e931c7dd2 rtio: fix timestamp shift 2016-11-23 13:36:30 +08:00
Sebastien Bourdeauducq e532261a9b drtio: fix FullMemoryWE usage 2016-11-23 12:25:43 +08:00
Sebastien Bourdeauducq 0443f83d5e runtime: support for targets without RTIO log channel 2016-11-23 10:50:55 +08:00
Sebastien Bourdeauducq 0c49679984 runtime: support for targets without RTIO log channel 2016-11-23 10:48:26 +08:00
Sebastien Bourdeauducq ffefdb9269 rtio: fix counter readback 2016-11-23 00:54:47 +08:00
Sebastien Bourdeauducq aa00627c0e rtio: fix CRI CSRs 2016-11-22 22:57:04 +08:00
Sebastien Bourdeauducq fbd83cf9ee kc705: remove stale DDS definition 2016-11-22 22:48:22 +08:00
Sebastien Bourdeauducq 9acc7d135e gateware: common RTIO interface 2016-11-22 22:46:50 +08:00
Sebastien Bourdeauducq 0aaf120ca7 kc705: remove stale DDS definition 2016-11-22 22:46:19 +08:00
Sebastien Bourdeauducq 3459793586 Merge branch 'master' into drtio 2016-11-22 15:15:22 +08:00
Robert Jördens 4160490e0a Merge branch 'phaser' into phaser2 
* phaser: (23 commits)
  RELEASE_NOTES: update
  pipistrello: add some inputs
  Remove last vestiges of nist_qc1.
  Fully drop AD9858 and kc705-nist_qc1 support (closes #576).
  coredevice.dds: reimplement fully in ARTIQ Python.
  compiler: unbreak casts to int32/int64.
  analyses.constness: fix false positive on x[...].
  inferencer: significantly improve the op-assignment diagnostic.
  Fix tests.
  Move mu_to_seconds, seconds_to_mu to Core.
  artiq_devtool: don't crash on invalid utf-8.
  artiq_devtool: detect a race condition during connect.
  llvm_ir_generator: handle no-op coercions.
  conda: use development version of migen/misoc
  Revert accidentally committed code.
  Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623"
  analyses.invariant_detection: implement (#622).
  Fix whitespace.
  coredevice.dds: work around the round(numpy.float64()) snafu.
  coredevice.dds: update from obsolete int(width=) syntax (fixes #621).
  ...
 2016-11-21 17:29:46 +01:00
Robert Jördens f7e8961ab0 Merge branch 'master' into phaser 
* master: (23 commits)
  RELEASE_NOTES: update
  pipistrello: add some inputs
  Remove last vestiges of nist_qc1.
  Fully drop AD9858 and kc705-nist_qc1 support (closes #576).
  coredevice.dds: reimplement fully in ARTIQ Python.
  compiler: unbreak casts to int32/int64.
  analyses.constness: fix false positive on x[...].
  inferencer: significantly improve the op-assignment diagnostic.
  Fix tests.
  Move mu_to_seconds, seconds_to_mu to Core.
  artiq_devtool: don't crash on invalid utf-8.
  artiq_devtool: detect a race condition during connect.
  llvm_ir_generator: handle no-op coercions.
  conda: use development version of migen/misoc
  Revert accidentally committed code.
  Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623"
  analyses.invariant_detection: implement (#622).
  Fix whitespace.
  coredevice.dds: work around the round(numpy.float64()) snafu.
  coredevice.dds: update from obsolete int(width=) syntax (fixes #621).
  ...
 2016-11-21 17:29:39 +01:00
Sebastien Bourdeauducq 93c310dfa5 pipistrello: add some inputs 2016-11-21 23:43:41 +08:00
whitequark 6aa5d9f6c6 Remove last vestiges of nist_qc1. 2016-11-21 15:36:22 +00:00
whitequark 5e8888d5f3 Fully drop AD9858 and kc705-nist_qc1 support (closes #576). 2016-11-21 15:14:17 +00:00
whitequark f4b7666768 coredevice.dds: reimplement fully in ARTIQ Python. 
This commit also drops AD9858 support from software.
 2016-11-21 15:13:26 +00:00
Robert Jördens 174c4be218 phaser: false paths sys<->{jesd,phy.tx} 2016-11-21 09:57:33 +01:00
Robert Jördens 74e5013fe5 sawg: fix b delay width 2016-11-20 16:39:22 +01:00
Sebastien Bourdeauducq ad1049d59a Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623" 
This reverts commit 4a62e09bd4.
 2016-11-20 21:35:07 +08:00
whitequark 30598720f4 Fix whitespace. 2016-11-20 09:50:00 +00:00
David Leibrandt 4a62e09bd4 gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 2016-11-20 15:22:32 +08:00
Robert Jördens 12e39a64cf sawg: reduce f0 oscillator width to 32 2016-11-19 17:07:07 +01:00
Robert Jördens 04813ea29b sawg: wir up limiting, saturating addition 2016-11-19 16:12:27 +01:00
Robert Jördens e53d0bcd5b dsp: add limits support to SatAddMixin 2016-11-19 16:12:27 +01:00
Robert Jördens 97a54046e8 rtio: auto clear output event data and address 
This is to support channels where variable length
event data is well-defined through zero-padding.
E.g. in the case of `Spline` zero-padding of events naturally
corresponds to low-order knots.

Use timestamp change as trigger. This assumes that writes to the
timestamp register always precede address and data writes.
It does not break support for ganged writes of the same event
timestamp and data/address to multiple channels or
channel-addresses.
 2016-11-19 16:12:27 +01:00
Robert Jördens b714137f76 phaser: 150 MHz rtio/jesd clock 2016-11-19 13:16:30 +01:00
Sebastien Bourdeauducq 02adae7397 drtio: fix link shutdown 2016-11-19 11:01:33 +08:00
Sebastien Bourdeauducq 381e58434f drtio: handle link restarts at transceiver level 2016-11-19 10:46:56 +08:00
Robert Jördens 0ee47e77ae phaser: fix widths 2016-11-18 17:24:11 +01:00
Robert Jördens bcde26f990 Revert "phaser: cap phy data width to 64 temporarily" 
This reverts commit 342b9e977e.
 2016-11-18 17:08:44 +01:00
Sebastien Bourdeauducq ba94ed8f4b drtio: check for absence of disparity errors before claiming RX ready 2016-11-19 00:05:59 +08:00
Robert Jördens 342b9e977e phaser: cap phy data width to 64 temporarily 2016-11-18 15:46:59 +01:00
Robert Jördens 14ddcd2e30 Revert "dsp/Delay: reset_less" 
for now

This reverts commit 98193d6fa1.
 2016-11-18 15:25:42 +01:00
Robert Jördens d678bb3fb6 phaser: update sawg tests 2016-11-18 15:23:56 +01:00
Sebastien Bourdeauducq 4d07974a34 drtio: reset link from CPU 2016-11-18 17:45:33 +08:00
Sebastien Bourdeauducq f040e27041 drtio: add timeout on FIFO get space request 2016-11-18 17:44:48 +08:00
Sebastien Bourdeauducq bb047aabe9 drtio: simpler link layer 2016-11-17 22:32:39 +08:00
Robert Jördens 51f23feeac dsp: implement sawg features 2016-11-17 03:20:37 +01:00
Robert Jördens 98193d6fa1 dsp/Delay: reset_less 2016-11-17 02:36:29 +01:00
Robert Jördens 424a1f8f4e dsp: move test tools 2016-11-16 13:39:19 +01:00
Sebastien Bourdeauducq 140bb0ecee drtio: aux controller fixes 2016-11-16 19:44:03 +08:00
Sebastien Bourdeauducq 6c9965b444 drtio: aux controller fixes 2016-11-15 12:02:41 +08:00
Sebastien Bourdeauducq e1394db861 drtio: aux controller minor fixes 2016-11-14 17:26:30 +08:00
Sebastien Bourdeauducq 84bd962ed5 drtio: integrate aux controller 2016-11-14 17:20:47 +08:00
Sebastien Bourdeauducq a4d92716da drtio: fix aux receiver, add aux transmitter 2016-11-14 17:18:54 +08:00