e624f45369
drtio: remove FIFO empty local detection optimization
...
It optimizes a marginal case, it is difficult to get right
(need to know the size of the FIFO for each channel), and
it adds complexity and potential bug sources.
2017-01-10 14:31:46 -06:00
f75fffcf96
drtio: fix satellite RX data corruption
2017-01-10 14:29:30 -06:00
fe53bab953
targets: kc705 -> kc705_dds
2017-01-05 18:40:56 +01:00
082fdaf450
move i2c to libboard, do bit-banging on comms CPU
2017-01-04 21:04:38 +01:00
86f6b391b7
ad9xxx -> ad9_dds
2017-01-04 11:34:52 +01:00
c08fc8aae9
firmware: support moninj without DDS. Closes #650
2017-01-04 11:26:02 +01:00
455250b3f9
remove DDS_AD9914 and DDS_ONEHOT_SEL
2017-01-03 22:04:25 +01:00
fbf5a4d4a2
Merge branch 'phaser2-rust-init'
2017-01-03 21:31:21 +01:00
9a80b8d533
spi: fix xfers with full data_width ( closes #615 )
...
misoc 15000af43611bbe8be13cb2b016e408f043202cd
2017-01-03 19:51:14 +01:00
7ff77bceac
move AD9616 and AD9154 initialization to firmware
2017-01-03 16:11:38 +01:00
417708af90
phaser: add note about DDS defines ( #650 )
2017-01-02 22:15:21 +01:00
f5f662200b
fir: streamline, optimize DSP extraction, left-align inputs
2016-12-20 21:39:51 +01:00
cfb66117af
fir: size hint for pre-adder
2016-12-20 17:58:06 +01:00
f310274e39
fir: cleanup halfgen4
2016-12-20 17:58:06 +01:00
6b998581cc
rtio: use same reset for counter_rtio whatever the interface delay is
2016-12-15 09:28:13 +08:00
115ea67860
fir: automatically use transposed topology
2016-12-14 19:16:07 +01:00
a451b675c9
Revert "fir: different adder layout"
...
This reverts commit 6f50e77b409c293c1905f28e69d79403a0803866.
2016-12-14 19:16:07 +01:00
93076b8efa
fir: different adder layout
2016-12-14 19:16:07 +01:00
61abd994e9
Revert "fir: force dsp48"
...
This reverts commit 0ad433832d1b6dcd803ffa086ae73b2ee0568326.
2016-12-14 19:16:07 +01:00
641d109786
fir: force dsp48
2016-12-14 19:16:07 +01:00
8381db279f
sawg: wire up all HBF outputs, latency compensation in phys, simplify
2016-12-14 19:16:07 +01:00
6cdb96c5e0
rtio: add support for latency compensation in phy
...
* if multiple RTIO channels influence the same data stream and physical
output channel (see SAWG) differential latency needs to be compensated
* this is a NOP for phys with zero delay (default)
* if delay==1, it adds one timestamp-wide register
* if delay >1, it adds one adder and one register
* latency compensation using (~10-50 deep) delay lines is about as
expensive as a single adder+register but very tedious to implement
2016-12-14 19:16:07 +01:00
4c27029be0
sawg: fix limit regs
2016-12-14 19:16:07 +01:00
e9592105ce
drtio: fix aux controller clock domain mistakes
2016-12-14 10:16:45 +08:00
527757b471
kc705_drtio: use ad9154_fmc_ebz
2016-12-13 14:30:26 +08:00
3b5abae935
drtio: fix clock domain conflict
2016-12-13 14:19:49 +08:00
03d13d3811
phaser: dma/drtio changes
2016-12-12 17:46:36 +01:00
c63fa46430
Merge branch 'phaser2'
...
* phaser2: (157 commits)
sawg/hbf: tweak pipeline for timing
fir: register multiplier output
conda/phaser: build-depend on numpy
sawg: reduce coefficient width
sawg: fix latency
test/fir: needs mpl. don't run by default
test/sawg: patch spline
sawg: use ParallelHBFCascade to AA [WIP]
fir: add ParallelHBFCascade
fir: add ParallelFIR and test
gateware/dsp: add FIR and test
README_PHASER: update
sawg: documentation
sawg: extract spline
sawg: document
sawg: demo_2tone
sawg: round to int64
gateware/phaser -> gateware/ad9154_fmc_ebz
phaser: fix typo
sawg: merge set/set64
...
2016-12-12 17:31:39 +01:00
4b61020b27
drtio: reset more local state
2016-12-12 18:48:10 +08:00
d99e64effd
drtio: clear any stale FIFO space reply
2016-12-12 18:02:56 +08:00
4c59c0fecf
Revert "drtio: order resets wrt writes"
...
This reverts commit 9a048c2b3a
2016-12-12 17:49:07 +08:00
8f747fa209
drtio: clear underflow and sequence error on reset
2016-12-12 17:39:14 +08:00
7196bc21c1
rtio: simplify error reset logic
...
Channel is always selected when reset is issued.
2016-12-12 17:35:10 +08:00
9a048c2b3a
drtio: order resets wrt writes
2016-12-12 17:18:07 +08:00
0a9f69a3ed
kc705_drtio_master: add missing rtio_core CSRs
2016-12-09 19:23:36 +08:00
bc36bda94a
perform RTIO init on comms CPU side
2016-12-09 14:16:55 +08:00
f6071a5812
sawg/hbf: tweak pipeline for timing
2016-12-08 17:00:53 +01:00
b7a308d33d
fir: register multiplier output
2016-12-08 17:00:39 +01:00
18e3f58c22
sawg: reduce coefficient width
2016-12-08 16:14:32 +01:00
598da09a93
sawg: fix latency
2016-12-08 15:53:35 +01:00
3eef6229cc
sawg: use ParallelHBFCascade to AA [WIP]
2016-12-08 15:32:57 +01:00
a629eb1665
fir: add ParallelHBFCascade
2016-12-08 15:30:26 +01:00
d303225249
fir: add ParallelFIR and test
2016-12-08 15:21:04 +01:00
7e0f3edca5
gateware/dsp: add FIR and test
2016-12-07 19:14:23 +01:00
4c3717932e
drtio: link layer debugging CSRs
2016-12-07 23:03:14 +08:00
b311830fc4
kc705: fix drtio_aux address conflict
2016-12-06 18:28:48 +08:00
4669d3f02f
kc705_drtio_satellite: add MiSoC system, hook up auxiliary controller
2016-12-06 14:56:42 +08:00
f4b7d39a69
kc705_drtio_master: hook up auxiliary controller
2016-12-06 14:56:15 +08:00
f3c50a37ca
rtio: always read full DMA sequence
2016-12-06 01:05:47 +08:00
c413d95b49
rtio: fix DMA get_csrs
2016-12-05 18:12:09 +08:00
b677c69faf
rtio: fix handling of o_status in DMA
2016-12-05 18:01:48 +08:00
75ea13748a
rtio: fix DMA data MSB and stop signaling, self-checking unittest
2016-12-05 18:01:48 +08:00
a5834765d0
rtio: more DMA fixes, better stopping mechanism
2016-12-05 18:01:48 +08:00
30bce5ad35
rtio: DMA fixes
2016-12-05 18:01:48 +08:00
88ad054ab6
Merge branch 'drtio'
2016-12-03 23:25:17 +08:00
5d145ff912
drtio: add false paths between sys and transceiver clocks
2016-12-03 23:03:01 +08:00
4b97b9f8ce
drtio: add clock constraints
2016-12-03 22:17:29 +08:00
e747696aaa
Merge remote-tracking branch 'm-labs/phaser2' into phaser2
...
* m-labs/phaser2:
phaser: fix typo
2016-12-02 14:11:56 +01:00
cbf1004df3
gateware/phaser -> gateware/ad9154_fmc_ebz
2016-12-02 14:11:41 +01:00
6353f6d590
drtio: support different configurations and speeds
2016-12-02 17:22:22 +08:00
3cee269afe
phaser: fix typo
2016-12-02 11:06:45 +08:00
3931d8097b
rtio: fix DMA TimeOffset stream.connect
2016-12-01 16:43:46 +08:00
d4cb1eb998
kc705: integrate DMA
2016-12-01 16:31:00 +08:00
7c59688a12
rtio: simple DMA fixes
2016-12-01 16:30:48 +08:00
46dbc44c8f
rtio: export DMA and CRIInterconnectShared
2016-12-01 16:30:29 +08:00
6c97a97d8c
rtio: support single-master CRI arbiter
2016-12-01 16:30:11 +08:00
a318243083
rtio: CRI arbiter (untested)
2016-12-01 15:41:43 +08:00
cd3f68ba76
rtio: DMA core (untested)
2016-11-30 18:43:19 +08:00
d8b5eac856
sawg: style
2016-11-29 20:51:40 +01:00
27160f5912
phaser: make sysref input only for timing
2016-11-29 15:28:10 +01:00
cf342eca6e
kc705_drtio_master: fix number of fine RTIO timestamp bits
2016-11-29 10:44:27 +08:00
f4c6d6eb69
kc705_drtio_master: fix number of fine RTIO timestamp bits
2016-11-28 15:18:54 +08:00
85f2467e2c
rtio: fix RTIO/DRTIO timestamp resolution discrepancy
2016-11-28 15:01:46 +08:00
9fdd29ddae
drtio: connect KernelInitiator correctly
2016-11-28 14:36:18 +08:00
5460202220
drtio: typo
2016-11-28 14:35:21 +08:00
4e1b497742
drtio: typo
2016-11-28 14:34:58 +08:00
c419c422fa
drtio: support for local RTIO core
2016-11-28 14:33:26 +08:00
046b8bfd33
drtio: fix transmit datapath with transceiver width > max packet width
2016-11-27 13:19:12 +08:00
0903964488
drtio: large data fixes
2016-11-27 02:12:50 +08:00
8090abef5d
drtio: large data support
2016-11-25 17:04:09 +08:00
55e37b41ec
phaser: use ttl_simple.Input for sync
2016-11-24 15:55:26 +01:00
8060652913
phaser: use Inout_8X
2016-11-24 15:21:03 +01:00
617650f3b2
phaser: extract target
2016-11-24 15:20:51 +01:00
1c84d1ee59
Merge branch 'master' into phaser2
...
* master:
rtio: support differential ttl
RELEASE_NOTES: int(a, width=b) removal, use int32/64
pc_rpc: use ProactorEventLoop on Windows (#627 )
2016-11-24 15:05:49 +01:00
95c885b580
rtio: support differential ttl
2016-11-24 15:04:12 +01:00
7cd27abaa6
drtio: do not reset remote TSC on reset command
2016-11-24 00:09:53 +08:00
2d62a89143
rtio: use large data register
2016-11-23 23:23:27 +08:00
07f2d84275
drtio: remote resets
2016-11-23 23:19:31 +08:00
9941f3557d
rtio: use only CRI commands for rio/rio_phy resets
2016-11-23 23:19:14 +08:00
347609d765
rtio: auto clear output event data and address
...
This is to support channels where variable length
event data is well-defined through zero-padding.
E.g. in the case of `Spline` zero-padding of events naturally
corresponds to low-order knots.
Use timestamp change as trigger. This assumes that writes to the
timestamp register always precede address and data writes.
It does not break support for ganged writes of the same event
timestamp and data/address to multiple channels or
channel-addresses.
2016-11-23 15:03:36 +01:00
32fdacd95a
Merge remote-tracking branch 'm-labs/master' into phaser2
...
* m-labs/master:
runtime: don't attempt to perform writeback if disabled in kernel.
runtime: print trace level log messages to UART during startup.
runtime: support for targets without RTIO log channel
runtime: support for targets without I2C
kc705: remove stale DDS definition
runtime: show a prompt to erase startup/idle kernels.
2016-11-23 14:56:29 +01:00
d400c81cb2
rtio: remove debug print
2016-11-23 13:37:14 +08:00
4e931c7dd2
rtio: fix timestamp shift
2016-11-23 13:36:30 +08:00
e532261a9b
drtio: fix FullMemoryWE usage
2016-11-23 12:25:43 +08:00
0443f83d5e
runtime: support for targets without RTIO log channel
2016-11-23 10:50:55 +08:00
0c49679984
runtime: support for targets without RTIO log channel
2016-11-23 10:48:26 +08:00
ffefdb9269
rtio: fix counter readback
2016-11-23 00:54:47 +08:00
aa00627c0e
rtio: fix CRI CSRs
2016-11-22 22:57:04 +08:00
fbd83cf9ee
kc705: remove stale DDS definition
2016-11-22 22:48:22 +08:00
9acc7d135e
gateware: common RTIO interface
2016-11-22 22:46:50 +08:00
0aaf120ca7
kc705: remove stale DDS definition
2016-11-22 22:46:19 +08:00
3459793586
Merge branch 'master' into drtio
2016-11-22 15:15:22 +08:00
4160490e0a
Merge branch 'phaser' into phaser2
...
* phaser: (23 commits)
RELEASE_NOTES: update
pipistrello: add some inputs
Remove last vestiges of nist_qc1.
Fully drop AD9858 and kc705-nist_qc1 support (closes #576 ).
coredevice.dds: reimplement fully in ARTIQ Python.
compiler: unbreak casts to int32/int64.
analyses.constness: fix false positive on x[...].
inferencer: significantly improve the op-assignment diagnostic.
Fix tests.
Move mu_to_seconds, seconds_to_mu to Core.
artiq_devtool: don't crash on invalid utf-8.
artiq_devtool: detect a race condition during connect.
llvm_ir_generator: handle no-op coercions.
conda: use development version of migen/misoc
Revert accidentally committed code.
Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 "
analyses.invariant_detection: implement (#622 ).
Fix whitespace.
coredevice.dds: work around the round(numpy.float64()) snafu.
coredevice.dds: update from obsolete int(width=) syntax (fixes #621 ).
...
2016-11-21 17:29:46 +01:00
f7e8961ab0
Merge branch 'master' into phaser
...
* master: (23 commits)
RELEASE_NOTES: update
pipistrello: add some inputs
Remove last vestiges of nist_qc1.
Fully drop AD9858 and kc705-nist_qc1 support (closes #576 ).
coredevice.dds: reimplement fully in ARTIQ Python.
compiler: unbreak casts to int32/int64.
analyses.constness: fix false positive on x[...].
inferencer: significantly improve the op-assignment diagnostic.
Fix tests.
Move mu_to_seconds, seconds_to_mu to Core.
artiq_devtool: don't crash on invalid utf-8.
artiq_devtool: detect a race condition during connect.
llvm_ir_generator: handle no-op coercions.
conda: use development version of migen/misoc
Revert accidentally committed code.
Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 "
analyses.invariant_detection: implement (#622 ).
Fix whitespace.
coredevice.dds: work around the round(numpy.float64()) snafu.
coredevice.dds: update from obsolete int(width=) syntax (fixes #621 ).
...
2016-11-21 17:29:39 +01:00
93c310dfa5
pipistrello: add some inputs
2016-11-21 23:43:41 +08:00
whitequark
6aa5d9f6c6
Remove last vestiges of nist_qc1.
2016-11-21 15:36:22 +00:00
whitequark
5e8888d5f3
Fully drop AD9858 and kc705-nist_qc1 support ( closes #576 ).
2016-11-21 15:14:17 +00:00
whitequark
f4b7666768
coredevice.dds: reimplement fully in ARTIQ Python.
...
This commit also drops AD9858 support from software.
2016-11-21 15:13:26 +00:00
174c4be218
phaser: false paths sys<->{jesd,phy.tx}
2016-11-21 09:57:33 +01:00
74e5013fe5
sawg: fix b delay width
2016-11-20 16:39:22 +01:00
ad1049d59a
Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 "
...
This reverts commit 4a62e09bd4
2016-11-20 21:35:07 +08:00
whitequark
30598720f4
Fix whitespace.
2016-11-20 09:50:00 +00:00
David Leibrandt
4a62e09bd4
gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623
2016-11-20 15:22:32 +08:00
12e39a64cf
sawg: reduce f0 oscillator width to 32
2016-11-19 17:07:07 +01:00
04813ea29b
sawg: wir up limiting, saturating addition
2016-11-19 16:12:27 +01:00
e53d0bcd5b
dsp: add limits support to SatAddMixin
2016-11-19 16:12:27 +01:00
97a54046e8
rtio: auto clear output event data and address
...
This is to support channels where variable length
event data is well-defined through zero-padding.
E.g. in the case of `Spline` zero-padding of events naturally
corresponds to low-order knots.
Use timestamp change as trigger. This assumes that writes to the
timestamp register always precede address and data writes.
It does not break support for ganged writes of the same event
timestamp and data/address to multiple channels or
channel-addresses.
2016-11-19 16:12:27 +01:00
b714137f76
phaser: 150 MHz rtio/jesd clock
2016-11-19 13:16:30 +01:00
02adae7397
drtio: fix link shutdown
2016-11-19 11:01:33 +08:00
381e58434f
drtio: handle link restarts at transceiver level
2016-11-19 10:46:56 +08:00
0ee47e77ae
phaser: fix widths
2016-11-18 17:24:11 +01:00
bcde26f990
Revert "phaser: cap phy data width to 64 temporarily"
...
This reverts commit 342b9e977e
2016-11-18 17:08:44 +01:00
ba94ed8f4b
drtio: check for absence of disparity errors before claiming RX ready
2016-11-19 00:05:59 +08:00
342b9e977e
phaser: cap phy data width to 64 temporarily
2016-11-18 15:46:59 +01:00
14ddcd2e30
Revert "dsp/Delay: reset_less"
...
for now
This reverts commit 98193d6fa1
2016-11-18 15:25:42 +01:00
d678bb3fb6
phaser: update sawg tests
2016-11-18 15:23:56 +01:00
4d07974a34
drtio: reset link from CPU
2016-11-18 17:45:33 +08:00
f040e27041
drtio: add timeout on FIFO get space request
2016-11-18 17:44:48 +08:00
bb047aabe9
drtio: simpler link layer
2016-11-17 22:32:39 +08:00
51f23feeac
dsp: implement sawg features
2016-11-17 03:20:37 +01:00
98193d6fa1
dsp/Delay: reset_less
2016-11-17 02:36:29 +01:00
424a1f8f4e
dsp: move test tools
2016-11-16 13:39:19 +01:00
140bb0ecee
drtio: aux controller fixes
2016-11-16 19:44:03 +08:00
6c9965b444
drtio: aux controller fixes
2016-11-15 12:02:41 +08:00
e1394db861
drtio: aux controller minor fixes
2016-11-14 17:26:30 +08:00
84bd962ed5
drtio: integrate aux controller
2016-11-14 17:20:47 +08:00
a4d92716da
drtio: fix aux receiver, add aux transmitter
2016-11-14 17:18:54 +08:00
b9ce2bb1f0
Merge branch 'phaser' into phaser2
...
* phaser: (127 commits)
phaser: use misoc cordic
phaser: fix DDS dummy cfg
runtime: disable the Nagle algorithm entirely.
runtime: buffer RPC send packets.
runtime: don't print debug messages to the UART.
runtime: print microsecond timestamps in debug messages.
artiq_devtool: abort if build failed.
conda: bump llvmlite-artiq dep.
conda: bump llvmlite-artiq dep.
llvm_ir_generator: use !{→unconditionally.}invariant.load metadata.
artiq_devtool: more robust port forwarding.
setup: remove paramiko dependency (optional and developer-only)
artiq_devtool: implement.
artiq_compile: actually disable attribute writeback.
conda: use pythonparser 1.0.
conda: tighten pythonparser dependency (fixes #600 ).
doc: clarify kernel_invariant doc (fixes #609 ).
compiler: Emit all-kernel_invariant objects as LLVM constants
conda: update for LLVM 3.9.
add has_dds, use config flags
...
2016-11-13 17:30:37 +01:00
70a70320bd
phaser: use misoc cordic
2016-11-13 17:29:38 +01:00
2e482505c6
phaser: fix DDS dummy cfg
2016-11-13 17:08:59 +01:00
f2f131e0fb
drtio: add aux receiver (untested)
2016-11-14 00:04:53 +08:00
aedb6747f2
Merge branch 'master' into phaser
...
* master: (47 commits)
runtime: disable the Nagle algorithm entirely.
runtime: buffer RPC send packets.
runtime: don't print debug messages to the UART.
runtime: print microsecond timestamps in debug messages.
artiq_devtool: abort if build failed.
conda: bump llvmlite-artiq dep.
conda: bump llvmlite-artiq dep.
llvm_ir_generator: use !{→unconditionally.}invariant.load metadata.
artiq_devtool: more robust port forwarding.
setup: remove paramiko dependency (optional and developer-only)
artiq_devtool: implement.
artiq_compile: actually disable attribute writeback.
conda: use pythonparser 1.0.
conda: tighten pythonparser dependency (fixes #600 ).
doc: clarify kernel_invariant doc (fixes #609 ).
compiler: Emit all-kernel_invariant objects as LLVM constants
conda: update for LLVM 3.9.
add has_dds, use config flags
Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""
Revert "Revert "Revert "Update for LLVM 3.9."""
...
2016-11-13 16:54:28 +01:00
8a48d6d66e
drtio: fix typo
2016-11-09 22:15:42 +08:00
863934c4fa
drtio: more reliable link layer init
2016-11-09 22:03:47 +08:00
99ad9b5917
add has_dds, use config flags
2016-11-08 23:33:03 +08:00
95acc9b9d4
drtio: allow specifying 7series RXSynchronizer initial phase
2016-11-08 16:52:40 +08:00
bcb5053fb6
drtio: fix master TSC KCSR readout
2016-11-08 16:40:50 +08:00
c4cd269afc
Merge branch 'master' into drtio
2016-11-06 00:13:32 +08:00
d158c69be0
phaser: fix frequency comment
2016-11-05 16:54:23 +01:00
47b9868c68
kc705_drtio_master: pretend drtio is rtio
2016-11-05 23:48:29 +08:00
de065b7578
kc705_drtio_satellite: set output dir
2016-11-05 23:48:15 +08:00
de47123737
drtio: connect RST and LOCKED on 7series RXSynchronizer MMCM
2016-11-05 00:24:49 +08:00
df7294792c
drtio: break some RT features into manager, add echo request CSR
2016-11-04 19:38:24 +08:00
1145a193dd
drtio: fix ack of echo and set_time requests
2016-11-04 18:36:43 +08:00
3da1cce783
drtio: add packet counters
2016-11-04 17:53:42 +08:00
747da3da15
drtio: differentiate local and remote unknown packet type errors
2016-11-04 15:17:19 +08:00
f76aa249ce
drtio: squelch 7series RXSynchronizer outputs when MMCM is unlocked
2016-11-04 15:16:48 +08:00
6a75837261
drtio: fix link_layer remote RX ready detection
2016-11-03 20:15:04 +08:00
1d027ffa95
drtio: fix gtx_7series comma alignment
2016-11-03 20:14:11 +08:00
ba58a8affd
drtio/gtx_7series: paranoid reset deglitching
2016-11-02 18:30:22 +08:00
whitequark
00100148f1
Si5324: actually write value of N32 into registers.
2016-11-02 07:09:04 +00:00
bee9774bd5
drtio: add link layer status CSR
2016-11-02 13:09:13 +08:00
1ed3278783
remove stale TODO
2016-11-02 10:53:54 +08:00
whitequark
a6ae254796
Si5324: update to free run from XA/XB, with CKIN1 having priority.
2016-11-01 16:01:24 +00:00
whitequark
636d4efe81
gateware: rewrite mailbox to use bits_for.
2016-11-01 06:28:43 +00:00
whitequark
18ae8d54a3
gateware: fix mailbox.
2016-11-01 02:33:00 +00:00
whitequark
898a716b91
runtime: work around mor1kx ignoring low bits of reset address.
...
Fixes #599 .
2016-10-31 18:13:15 +00:00
0c1a76d668
unify rtio/drtio kernel interface
2016-11-01 00:30:16 +08:00
whitequark
617e345d16
gateware: fix kernel CPU exec address.
2016-10-31 15:16:35 +00:00
07ad00c1ca
drtio: split kernel/system CSRs
2016-10-31 18:09:36 +08:00
9aa94e1a2d
adapt to migen/misoc changes
2016-10-31 00:53:01 +08:00
2392113bb6
kc705: use misoc clock for false path
2016-10-30 11:16:04 +08:00
whitequark
2ac85cd40f
runtime: implement prototype background RPCs.
2016-10-29 21:34:25 +00:00
c656a53532
kc705: clean up clock constraints
2016-10-29 21:28:01 +08:00
ed4d57c638
use new Migen signal attribute API
2016-10-29 21:19:58 +08:00
da5208e160
drtio: add master gateware target
2016-10-29 17:31:15 +08:00
7c05dccf65
drtio: add support for 125MHz clock on GTX_1000BASE_BX10
2016-10-29 17:30:29 +08:00
95def81c03
drtio: squelch frame signals until link layer ready
2016-10-29 17:05:30 +08:00
4f6241283c
drtio: always use NoRetiming on MultiReg inputs
2016-10-29 16:37:53 +08:00
2a1e529dcf
phaser: DDS config dummies
2016-10-28 01:58:08 +02:00
6d07a16c62
Merge branch 'master' into phaser
...
* master: (72 commits)
gateware: extend mailbox to 3 entries.
master/worker_db: set default value for archive
master: keep dataset manager consistent when set_dataset is called with contradictory attributes
master: archive input datasets. Closes #587
master: ensure same dataset is in broadcast and local when mutating
scheduler: default submission arguments, closes #577
pdq2: sync with pdq2
doc: clarify usage of pause/check_pause, closes #571
dashboard/datasets: use scientific spinbox and increase number of decimals, closes #572
gateware/spi: fix import
runtime: fix use of $(realpath) in Makefile.
test: fix printf specifier.
llvm_ir_generator: make sure RPC allocations are not underaligned.
runtime: use i64 for watchdog timeout, not i32.
runtime: port ksupport to Rust.
runtime: remove some redundant libm functions copied inline.
language: Add "A" (ampere) as well-known unit for arguments
conda: misoc 0.4 (csr)
runtime: cap log level at debug.
runtime: discard unnecessary sections.
...
2016-10-28 01:40:11 +02:00
c428800caf
phaser: spi, sma_gpio: 2.5 V
2016-10-27 15:53:49 +02:00
65b2e4464c
phaser: sysref/sync diff term
2016-10-27 14:14:56 +02:00
ea0c304a0c
phaser2: wip
2016-10-27 01:00:42 +02:00
929a7650a8
drtio: fixes
2016-10-26 22:03:44 +08:00
45621934fd
drtio: forward errors to CSR
2016-10-26 22:03:05 +08:00
7f8e53aa5c
drtio: more fixes and tests
2016-10-26 11:48:47 +08:00
f763b519f4
drtio: fix channel selection
2016-10-26 00:33:21 +08:00
ad042de954
drtio: fixes, basic TTL working in simulation
2016-10-25 12:41:16 +08:00
e981b23548
phaser: use misoc cordic
2016-10-24 19:33:23 +02:00
d2f776b0d0
phaser: add more tools
2016-10-24 17:39:14 +02:00
a4e85081aa
drtio: more simple fixes
2016-10-24 23:32:49 +08:00
029e0d95b7
drtio: simple fixes
2016-10-24 23:10:15 +08:00
c39987b617
drtio: handle underflow/sequence error CSRs
2016-10-24 20:46:55 +08:00
7dd6eb2f5e
drtio: add RT write controller
2016-10-24 19:50:13 +08:00
83bec06226
drtio: fifo level -> fifo space
2016-10-24 15:59:12 +08:00
aa8e211735
drtio/rt_packets: fix
2016-10-22 13:03:35 +08:00
449d1c4dc6
rtio: export CDC modules
2016-10-22 13:03:10 +08:00
67c19ab178
drtio: RTPacketMaster RX, untested
2016-10-22 01:04:14 +08:00
3b4a40401a
drtio: RTPacketMaster TX (WIP)
2016-10-21 22:46:14 +08:00
