ff0da2c9fc
sawg: stage code for y-data exchange on channels
2017-06-22 10:26:29 +02:00
b6569df02f
dsp/tools: clean up SatAddMixin logic
2017-06-22 10:26:29 +02:00
74cf074538
drtio: remove sawg_3g from example targets, add converter SPI bus from FMC-EBZ at all times
2017-06-21 17:01:52 +08:00
0d8067256b
rtio: refactor RelaxedAsyncResetSynchronizer
2017-06-18 14:37:08 +02:00
424b2bfbd8
rtio: describe rio and rio_phy domains a bit more
2017-06-17 12:21:07 +02:00
219dfd8984
rtio: add one register level for rio and rio_phy resets
...
* This should give Vivado some wiggle room during PnR.
* It needs three new clock domains which is ugly. But since
AsyncResetSynchronizer can only drive clock domains resets directly
there seems to be no other way to add one register level currently.
2017-06-17 12:17:48 +02:00
e19bfd4781
test_sawg_fe: add ref_multiplier to simulated core
2017-06-16 19:45:24 +02:00
2a76034fbc
cri: add note about clearing of o_data
2017-06-16 19:06:00 +02:00
3f37870e25
sawg: register pre-hbf adder
2017-06-13 18:15:44 +02:00
e229edd5d5
sawg: add register after hbf for timing
2017-06-12 23:08:27 +02:00
315338fca9
test/sawg: test HBF overshoot, fix sim patching
2017-06-12 20:35:47 +02:00
9a8a7b9102
sawg: handle clipping interpolator
...
* give 1 bit headroom to interpolator to handle overshoot
* fix Config limiter widths (NFC)
* move clipper to behind the HBF to correctly shield DUC
This leaves a factor of two headroom for the sum of the following
effects:
* HBF overshoot (~15 % of the step)
* A1/A2 DDS sum
While this is technically not sufficient and can still lead to
overflows, it is unlikely that one would trigger those. It would require
doing large amplitude A1, large amplitude A2 and additionally doing
amplitude/phase jumps that would overshoot the HBF. No sane person would
try that, right?
closes #743
2017-06-12 20:33:54 +02:00
1fb3995ffc
Revert "fir/ParallelHBFUpsampler: add headroom (gain=2)"
...
This reverts commit 6ac9d0c41e
2017-06-12 20:07:25 +02:00
332bcc7f3b
fir: check widths
2017-06-12 20:07:23 +02:00
39a1dcbb3d
test/fir: look at overshoot behavior
2017-06-12 20:06:07 +02:00
6ac9d0c41e
fir/ParallelHBFUpsampler: add headroom (gain=2)
...
This addresses part of #743
2017-06-12 18:59:45 +02:00
bfc224d4ba
phaser: adjust to new jesd
2017-05-22 19:59:53 +02:00
679060af1d
phaser: enable dma
2017-05-22 19:32:34 +02:00
4901cb9a8a
sawg: fix clr width
2017-05-22 17:46:55 +02:00
253ee950f6
sawg: fix config channel addr
2017-05-22 17:45:14 +02:00
9ab63920e0
Remove Pipistrello support
...
Closes #658
Closes #381
2017-05-15 17:17:44 +08:00
170d2886fd
Merge branch 'pdq'
...
* pdq:
pdq: documentation
pdq2 -> pdq
pdq2: use 16 bit data, buffered read_mem()
spi: style
pdq2: mem_read
pdq2: align subsequent writes to end
sma_spi: undo cri_con
pdq2: memory write, kernel_invariants
sma_spi: cri/cd changes
sma_spi: LVCMOS25
coredevice.spi: kernel invariants and style
sma_spi: free up user_sma pins
sma_spi: add demo target with SPI on four SMA
pdq2: memory write
pdq2: crc/frame register accessors
doc: pdq2 spi backend
pdq2: config writes
2017-05-12 11:46:45 +02:00
Florent Kermarrec
79c339d4ac
gateware/targets/phaser: jesd core now handles jsync completely
2017-04-26 22:25:08 +02:00
Florent Kermarrec
0546affd4c
gateware/target/phaser: jesd start signal renamed to jsync
2017-04-26 12:27:40 +02:00
ed8edf318d
sma_spi: undo cri_con
2017-04-08 17:19:35 +02:00
16b7f8f50c
sma_spi: cri/cd changes
2017-04-08 17:16:19 +02:00
1e6e81a19e
sma_spi: LVCMOS25
2017-04-08 17:16:19 +02:00
555b3c38c1
sma_spi: free up user_sma pins
2017-04-08 17:16:19 +02:00
2c7c6143ab
sma_spi: add demo target with SPI on four SMA
2017-04-08 17:16:19 +02:00
c2667debf8
drtio: test replace in RTL simulation
2017-04-06 16:33:59 +08:00
729e7b52f0
drtio: collision/replace fixes
2017-04-06 16:33:49 +08:00
83d87b5805
drtio: remove outdated comment
2017-04-06 12:45:10 +08:00
c0100ebc56
rtio: fix indentation
2017-04-06 12:08:13 +08:00
207453efcd
rtio: add a missing case for collision reporting
2017-04-06 11:28:16 +08:00
674bf82f3a
gateware: add cri_con CSRs to all DMA-capable targets
2017-04-06 01:14:09 +08:00
5e3aef45dc
drtio: support collision/replace + detect sequence errors at satellite
2017-04-06 01:06:56 +08:00
whitequark
17b5388259
gateware: remove one stray CRI arbiter remnant.
2017-04-05 16:38:56 +00:00
whitequark
464202d0aa
gateware: connect CRI switch to kernel CPU.
2017-04-05 16:10:53 +00:00
whitequark
47632f81b1
gateware: CRIArbiter -> CRISwitch.
2017-04-05 16:10:39 +00:00
whitequark
391660e545
gateware: simplify the CRI arbiter to use a plain mux.
2017-04-05 15:09:19 +00:00
12249dac57
rtio: do not clear asynchronous error flags on RTIO reset
2017-04-03 00:20:30 +08:00
db3118b916
drtio: use BlindTransfer for error reporting
2017-04-03 00:18:07 +08:00
8c414cebc7
drtio: report busy errors
2017-04-03 00:11:08 +08:00
008678b741
drtio: add infrastructure for reporting busy/collision errors
2017-04-02 23:45:55 +08:00
0a687b7902
drtio: report satellite errors through firmware
2017-04-01 12:18:00 +08:00
28211e0b32
gateware: reset RTIO DMA core when kernel CPU is reset
2017-03-31 15:35:28 +08:00
200c499114
test: change base address in DMA simulation testbench
2017-03-31 13:17:00 +08:00
ea3af1e20e
drtio: remove obsolete CSR accesses from test
2017-03-27 16:44:22 +08:00
b74d6fb9ba
make collision and busy asynchronous errors, and simplify CPU/gateware handshake for output errors and reads
2017-03-27 16:32:23 +08:00
whitequark
4de336fbe9
gateware: reverse bytes of SDRAM word, not bits.
2017-03-17 11:16:46 +00:00
whitequark
6b63322106
gateware: reverse SDRAM words in RTIO DMA engine.
2017-03-17 07:29:28 +00:00
whitequark
4b14887ddb
gateware: work around ISE/Vivado bugs with very wide shifts.
2017-03-17 07:29:28 +00:00
whitequark
4beda73217
firmware: don't build libdyld through misoc.
2017-03-14 08:33:31 +00:00
a7de58b604
rtio: Inout → InOut
2017-03-14 14:18:55 +08:00
13ae1d1a38
drtio: input unittest
2017-03-14 14:14:55 +08:00
56fd9b3b4b
drtio: input fixes
2017-03-14 14:14:43 +08:00
95ede18809
drtio: support PHY latency compensation
2017-03-14 00:01:38 +08:00
497c795d8c
drtio: input support (untested)
2017-03-13 23:54:44 +08:00
d1b9f9d737
drtio: rt_packets → rt_packet
2017-03-13 00:10:07 +08:00
6b7c781ff2
drtio: introduce 'standard request' interface in RT packet layer
2017-03-13 00:08:03 +08:00
2b8729f326
drtio: clear any read request on satellite reset
2017-03-13 00:00:38 +08:00
1e47e638bb
drtio: implement inputs in RTPacketSatellite, reorganize code
2017-03-07 00:46:59 +08:00
1e6a33b586
rtio: handle input timeout in gateware
...
The information passed by the runtime will be used by the DRTIO core
to poll the remote side appropriately.
2017-03-03 17:37:47 +08:00
d2f2415b50
analyzer: use CRI and connect at RTIO core
...
This causes DMA events to be included in analyzer traces.
2017-03-02 18:47:56 +08:00
7d6ebabc1b
reorganize core device communication code
2017-02-27 18:37:30 +08:00
f017d1771f
gateware: remove unused configs in targets (not needed with new moninj)
2017-02-25 12:14:56 +08:00
360be0098f
drtio: map local RTIO core on lower channels
2017-02-24 18:15:27 +08:00
b455ea447d
gateware: add moninj to drtio targets
2017-02-21 21:54:47 +08:00
c66efc0279
moninj: do not require a rsys clock domain
2017-02-20 15:52:48 +08:00
c022b53578
kernel_cpu: enable perf counters
2017-02-18 14:09:12 +01:00
935799dfb7
drtio: fix satellite transceiver clocking
2017-02-04 19:18:35 +08:00
whitequark
b9cbedceb1
firmware: migrate last vestiges of the old runtime build system.
2017-02-03 12:59:35 +00:00
a8ecbd6041
firmware: do not attempt to build Si5324 code when gateware does not support it
2017-02-03 12:27:13 +08:00
d181989de9
drtio: reset Si5324 at each boot
2017-02-03 12:00:58 +08:00
b3697f951a
drtio: forward clocks to SMA connectors for debugging
2017-02-03 12:00:36 +08:00
aafefee7f5
targets: make number of ethmac slots consistent
2017-02-02 23:02:51 +08:00
whitequark
44a9a79f96
firmware: port allocator to Rust.
2017-02-02 10:55:35 +00:00
f512ea42dc
drtio: initialize si5324 in firmware
2017-02-02 18:11:24 +08:00
whitequark
b95db4fa4e
Use four ethmac buffers instead of two.
...
This should address an issue where the host sends a packet burst,
the second packet in a burst gets dropped, the rest also gets
dropped since smoltcp doesn't do reassembly, and the entire dance
is repeated on every retransmit.
2017-01-30 07:42:27 +00:00
9800acea92
drtio: program Si5324 for 150MHz in 3G config
2017-01-30 14:50:12 +08:00
7daab07a29
drtio: fix syntax/import
2017-01-30 13:01:45 +08:00
d8e9949266
drtio: initialize AD9516 clock chip
2017-01-30 11:06:45 +08:00
f6024b6c9a
drtio: fix ad9154 extension registration
2017-01-30 10:59:22 +08:00
43aad0914e
python3.5 -> python3
...
Many things also work with Python 3.6.
2017-01-30 09:24:43 +08:00
657afd770e
artiq/test/gateware -> artiq/gateware/test
...
This allows gateware simulations to be skipped or not considered for coverage when using test discovery.
2017-01-30 09:00:55 +08:00
94b0783897
drtio: remove support for transceiver SMAs
...
Passive SFP cables do not require bitstream rebuilds and do not cause weird transceiver failures.
2017-01-27 23:33:50 +08:00
whitequark
de17908b38
Revert "Globally update UART baudrate to 921600."
...
This reverts commit b29e2d5bfe
2017-01-25 00:31:28 +00:00
whitequark
b29e2d5bfe
Globally update UART baudrate to 921600.
2017-01-24 22:25:58 +00:00
whitequark
527b1e986c
firmware: integrate smoltcp instead of lwip.
2017-01-23 13:59:34 +00:00
28a41a2f60
gateware: fix aeb1ba847
2017-01-18 17:11:02 -06:00
2a7a8f91ca
gateware: fix import
2017-01-18 16:51:30 -06:00
ce31ffddb0
firmware: add satellite manager
...
The code duplication with the runtime should be cleaned up later.
2017-01-18 16:50:32 -06:00
b40953800a
gateware: soc -> amp.soc
2017-01-18 15:28:14 -06:00
aeb1ba8471
gateware: use default MiSoC timer
2017-01-18 15:22:33 -06:00
b8d89d56b1
drtio: add GenericRXSynchronizer
2017-01-15 13:44:43 -06:00
0edffb54c2
drtio: fix packet truncation detection in RTPacketSatellite
2017-01-13 09:29:22 -06:00
6805feb494
drtio: report truncated packets
2017-01-12 23:44:45 -06:00
7c699e2f80
drtio: add FIFO space request count debug API
2017-01-11 13:48:14 -06:00
c25186fae1
drtio: print packet error descriptions in log
2017-01-10 18:03:01 -06:00
98598df78e
rtio: keep retrying on get FIFO space timeout
2017-01-10 16:12:32 -06:00
