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5d3c76fd50
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sayma_rtm: use bitstream opts in migen
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2018-04-27 15:43:32 +00:00 |
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307cd07b9d
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suservo: lots of gateware/ runtime changes
tested/validated:
* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback
individual changes below:
suservo: correct rtio readback
suservo: example, device_db [wip]
suservo: change rtio channel layout
suservo: mem ports in rio domain
suservo: sck clocked from rio_phy
suservo: cleanup, straighten out timing
suservo: dds cs polarity
suservo: simplify pipeline
suservo: drop unused eem names
suservo: decouple adc SR from IIR
suservo: expand coredevice layer
suservo: start the correct stage
suservo: actually load ctrl
suservo: refactor/tweak adc timing
suservo: implement cpld and dds init
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2018-04-27 13:50:26 +02:00 |
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Florent Kermarrec
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8212e46f5e
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sayma_amc: filter jesd refclk/sysref with jreset (hmc7043 can generate noise when unconfigured see sinara issue #541)
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2018-04-27 13:04:37 +02:00 |
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f9b2c32739
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suservo: add pgia spi channel
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2018-04-25 17:14:25 +00:00 |
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37c186a0fc
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suservo: refactor, constrain
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
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2018-04-25 13:44:52 +00:00 |
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d0258b9b2d
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suservo: set input delays
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2018-04-24 15:30:25 +00:00 |
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3942c2d274
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suservo: fix clkout cd drive
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2018-04-24 10:18:32 +00:00 |
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f74998a5e0
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suservo: move arch logic to top, fix tests
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2018-04-23 21:11:26 +00:00 |
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929ed4471b
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kasli/SUServo: use suservo, implement urukul_qspi
m-labs/artiq#788
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2018-04-23 18:30:18 +00:00 |
|
Florent Kermarrec
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439d2bf2bc
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sayma/serwb: adapt, full reset of rtm on link reset
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2018-04-17 19:24:03 +02:00 |
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eac447278f
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kasli: add MITLL variant
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2018-04-17 19:00:11 +08:00 |
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756e120c27
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kasli/sysu: add comments
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2018-04-17 18:46:55 +08:00 |
|
Florent Kermarrec
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1acd7ea1db
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sayma/serwb: re-enable scrambling
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2018-04-17 00:49:36 +02:00 |
|
Florent Kermarrec
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ca01c8f1cb
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sayma: reduce serwb linerate to 500Mbps
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2018-04-16 23:19:15 +02:00 |
|
Florent Kermarrec
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bb90fb7d59
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sayma/serwb: remove scrambling (does not seems to work on sayma for now...)
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2018-04-07 15:57:57 +02:00 |
|
Florent Kermarrec
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e15f8aa903
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sayma/serwb: enable scrambling
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2018-04-07 14:52:37 +02:00 |
|
Florent Kermarrec
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2f8bd022f7
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sayma_rtm: remove sys0p2x clock
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2018-04-07 03:10:34 +02:00 |
|
Florent Kermarrec
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73b727cade
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serwb: new version using only sys/sys4x clocks domains, scrambling deactivated.
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2018-04-07 02:59:14 +02:00 |
|
Florent Kermarrec
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dd21c07b85
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targets/sayma_rtm: fix serwb 2 ...
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2018-04-03 18:59:05 +02:00 |
|
Florent Kermarrec
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7488703f23
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targets/sayma_rtm: fix serwb
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2018-04-03 18:57:00 +02:00 |
|
Florent Kermarrec
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aef0153a8f
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targets/sayma: adapt to new serwb clocking
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2018-04-03 18:53:39 +02:00 |
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493d2a653f
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siphaser: add false path between sys_clk and mmcm_freerun_output
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2018-03-29 10:55:41 +08:00 |
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4229c045f4
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kasli: fix DRTIO master clock constraint
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2018-03-29 10:20:31 +08:00 |
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3d89ba2e11
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sayma: remove debug leftover
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2018-03-29 10:20:17 +08:00 |
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605292535c
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kasli: ignore OSERDESE2->ISERDESE2 timing path on DRTIO targets as well
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2018-03-29 10:12:02 +08:00 |
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3a0dfb7fdc
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ad53xx: port monitor, moninj dashboard, kc705 target
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2018-03-24 16:04:02 +01:00 |
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770b0a7b79
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novogorny: conv -> cnv
* parity with sampler
* also add novogorny device to opticlock
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2018-03-21 18:38:42 +00:00 |
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1afce8c613
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kasli: simplify single eem pin formatting
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2018-03-21 13:08:42 +01:00 |
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d48b8f3086
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kasli: fix sampler sdr/cnv pins
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2018-03-21 09:28:00 +00:00 |
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1fb5907362
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kasli: add SUServo variant (Sampler-Urukul Servo)
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2018-03-21 08:53:26 +00:00 |
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f74d5772f4
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sampler: add wide eem definition
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2018-03-21 08:53:26 +00:00 |
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32f22f4c9c
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sayma: disable SERDES TTL entirely
Timing closure becomes very random, even at 4X.
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2018-03-21 13:03:48 +08:00 |
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f8c2d54e75
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ttl_serdes_ultrascale: configurable SERDES ratio. Also try X4 on Sayma
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2018-03-21 13:01:38 +08:00 |
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9c2d343052
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sayma: use SERDES RTIO TTL
This is not enabled on the standalone design as it breaks timing.
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2018-03-21 10:53:52 +08:00 |
|
Thomas Harty
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37d431039d
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Fix typos.
Reduce ififo depth to 4 for Zotino.
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2018-03-19 09:42:18 +00:00 |
|
Thomas Harty
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c4fa44bc62
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Add Zotino and Sampler functions to Kasli. Add Zotino to Kasli EEM 7 on OptiClock.
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2018-03-18 00:25:43 +00:00 |
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Florent Kermarrec
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eb6e59b44c
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sayma_rtm: fix serwb timing constraints (was causing the gated clock warning)
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2018-03-12 11:25:29 +01:00 |
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fc3d97f1f7
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drtio: remove spurious multichannel transceiver clock constraints
They used to cause (otherwise harmless) Vivado critical warnings.
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2018-03-09 22:46:27 +08:00 |
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caf7b14b55
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kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code
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2018-03-09 22:36:16 +08:00 |
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82831a85b6
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kasli/opticlock: add eem6 phys
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2018-03-07 21:32:59 +01:00 |
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916197c4d7
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siphaser: cleanup
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2018-03-07 11:15:44 +08:00 |
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7d98864b31
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sayma: enable siphaser
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2018-03-07 10:57:30 +08:00 |
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a6e29462a8
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sayma: enable multilink DRTIO
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2018-03-07 10:57:30 +08:00 |
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c34d00cbc9
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drtio: implement Si5324 phaser gateware and partial firmware support
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2018-03-07 10:57:30 +08:00 |
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994ceca9ff
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sayma_amc: disable slave fpga gateware loading
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2018-03-06 17:27:43 +01:00 |
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62af7fe2ac
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Revert "kasli/opticlock: use plain ttls for channels 8-23"
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.
No decrease in power consumption or improvement in timing.
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2018-03-06 14:27:19 +01:00 |
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fd3cdce59a
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kasli/opticlock: use plain ttls for channels 8-23
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2018-03-06 14:27:19 +01:00 |
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956098c213
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kasli: add second urukul, make clk_sel drive optional
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2018-03-06 14:26:27 +01:00 |
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07de7af86a
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kasli: make second eem optional in urukul
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2018-03-06 14:26:26 +01:00 |
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ddcc68cff9
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sayma_amc: move bitstream options to migen
close #930
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2018-03-02 18:13:03 +08:00 |
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