2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-24 10:54:02 +08:00
Commit Graph

139 Commits

Author SHA1 Message Date
4a0eaf0f95 phaser: add jesd204b rtio dds
gateware: add jesd204b awg

gateware: copy phaser (df3825a)
dsp/tools: update satadd mixin
phaser: no DDS stubs
dsp: accu fix
phaser: cleanup/reduce

sawg: kernel support and docs

sawg: coredevice api fixes

sawg: example ddb/experiment

phaser: add conda package

examples/phaser: typo

sawg: adapt tests, fix accu stb

sawg: tweak dds parameters

sawg: move/adapt/extend tests

sawg: test phy, refactor

phaser: non-rtio spi

phaser: target cli update

phaser: ad9154-fmc-ebz pins

phaser: reorganize fmc signal naming

phaser: add test mode stubs

phaser: txen is LVTTL

phaser: clk spi xfer test

phaser: spi for ad9154 and ad9516

phaser: spi tweaks

ad9154: add register map from ad9144.xml

ad9516: add register map from ad9517.xml and manual adaptation

ad9154_reg: just generate getter/setter macros as well

ad9154: reg WIP

ad9154: check and fix registers

kc705: single ended rtio_external_clk

use single ended user_sma_clk_n instead of p/n to free up one clock sma

kc705: mirror clk200 at user_sma_clock_p

ad9516_regs.h: fix B_COUNTER_MSB

phase: wire up clocking differently

needs patched misoc

kc705: feed rtio_external_clock directly

kc705: remove rtio_external_clk for phaser

phaser: spi tweaks

ad9516: some startup

ad9516_reg fixes

phaser: setup ad9516 for supposed 500 MHz operation

ad9516: use full duplex spi

ad9154_reg: add CONFIG_REG_2

ad9154_reg: fixes

phaser: write some ad9154 config

ad9154_reg: fixes

ad9154: more init, and human readable setup

ad9154/ad9516: merge spi support

ad9154: status readout

Revert "kc705: remove rtio_external_clk for phaser"

This reverts commit d500288bb44f2bf2eeb0c2f237aa207b0a8b1366.

Revert "kc705: feed rtio_external_clock directly"

This reverts commit 8dc7825519e3e75b7d3d29c9abf10fc6e3a8b4c5.

Revert "phase: wire up clocking differently"

This reverts commit ad9cc450ffa35abb54b0842d56f6cf6c53c6fbcc.

Revert "kc705: mirror clk200 at user_sma_clock_p"

This reverts commit 7f0dffdcdd28e648af84725682f82ec6e5642eba.

Revert "kc705: single ended rtio_external_clk"

This reverts commit a9426d983fbf5c1cb768da8f1da26d9b7335e9cf.

ad9516: 2000 MHz clock

phaser: test clock dist

phaser: test freqs

ad9154: iostandards

phaser: drop clock monitor

phaser: no separate i2c

phaser: drive rtio from refclk, wire up sysref

phaser: ttl channel for sync

ad9154: 4x interp, status, tweaks

phaser: sync/sysref 33V banks

phaser: sync/sysref LVDS_25 inputs are VCCO tolerant

phaser: user input-only ttls

phaser: rtio fully from refclk

ad9154: reg name usage fix

ad9154: check register modifications

Revert "ad9154: check register modifications"

This reverts commit 45121d90edf89f7bd8703503f9f317ad050f9564.

ad9154: fix status code

ad9154: addrinc, recal serdes pll

phaser: coredevice, example tweaks

sawg: missing import

sawg: type fixes

ad9514: move setup functions

ad9154: msb first also decreasing addr

phaser: use sys4x for rtio internal ref

phaser: move init code to main

phaser: naming cleanup

phaser: cleanup pins

phaser: move spi to kernel cpu

phaser: kernel support for ad9154 spi

ad9154: add r/w methods

ad9154: need return annotations

ad9154: r/w methods are kernels

ad9154_reg: portable helpers

phaser: cleanup startup kernel

ad9154: status test

ad9154: prbs test

ad9154: move setup, document

phaser: more documentation
2016-10-05 16:17:50 +02:00
2701b914e2 conda: update migen version requirements 2016-09-24 21:02:19 +08:00
5b713ea385 conda: fix nist_clock summary 2016-09-02 19:06:36 +02:00
91b59cd584 conda: misoc 0.3 2016-08-26 14:01:00 +02:00
0a4d4e30ef doc: use sphinx_rtd_theme 2016-08-25 21:52:46 +02:00
60919c2ea7 doc: use wavedrom to visualize stuff 2016-08-25 12:17:05 +02:00
whitequark
4c6cad2977 Add a Rust component in the runtime. 2016-08-17 09:07:19 +00:00
whitequark
6c2ca69d4f conda: require misoc 0.2. 2016-08-16 07:08:35 +00:00
whitequark
5f5975844a Revert "Update for LLVM 3.9."
This reverts commit 3aa7b99b8f.
2016-08-13 04:43:19 +00:00
whitequark
3aa7b99b8f Update for LLVM 3.9. 2016-08-13 03:28:04 +00:00
c065b5866f require Python 3.5.2, remove monkey patches 2016-07-07 14:55:21 +08:00
4e241f10c5 conda: try lowercase package name 2016-06-19 09:59:42 +08:00
b97ad69135 conda: install lit and OutputCheck 2016-06-19 09:58:02 +08:00
6500d3fc63 conda: use setuptools entry_points
Conda entry_points doesn't support gui_scripts
2016-06-19 09:31:23 +08:00
4d6f53ce67 conda: obviously, platform-specific dependencies are broken 2016-05-27 22:45:01 -05:00
16063ff8fb conda: another attempt at platform-specific dependencies 2016-05-27 22:25:19 -05:00
8c1f1d8f2a rpctool: make readline optional, add to conda dependencies. Closes #442 2016-05-25 11:11:59 -05:00
6686383378 artiq_browser: add entry points 2016-04-05 17:22:16 +08:00
ed1c368e73 gateware: name targets consistently. Closes #290 2016-04-05 16:07:29 +08:00
whitequark
e908a5fceb conda: update llvmlite-artiq dependency.
Build 24 includes addc optimizations.
2016-04-05 00:48:41 +00:00
7453d85d5e GUI -> dashboard 2016-04-04 22:12:45 +08:00
whitequark
ce30045dd4 conda: update llvmlite-artiq dependency.
Build 22 includes debug information support.
2016-04-02 18:40:06 +00:00
whitequark
6a34a75b99 conda: require llvmlite-artiq built for LLVM 3.8. 2016-04-01 09:35:28 +00:00
whitequark
2c04979727 compiler: update for LLVM 3.7. 2016-03-31 11:23:47 +00:00
d9e9b66494 depend on asyncserial 2016-03-22 21:56:09 +08:00
129927490b conda: pyqt -> pyqt5 2016-02-21 17:14:59 +08:00
whitequark
1cfca74fcb conda: remove spurious artiq dep from gateware packages. 2016-02-14 13:35:40 +00:00
734fa593e4 conda bitstreams: depend on artiq 0.1 2016-02-14 14:21:31 +01:00
ed36a96f8f conda/artiq: pyqt (not 5, to be revisited) 2016-02-14 02:24:46 +01:00
801b256d67 conda: use git_url
needed for conda-build >= 0.19.0
2016-02-14 02:21:07 +01:00
fcf7a6be2e Revert "conda: restrict binutils-or1k-linux dependency to linux."
This reverts commit 5bead8b83f.
2016-02-10 23:42:24 +01:00
64263b75d0 use https for m-labs.hk 2016-02-10 17:20:29 +01:00
f3f667be5b conda: fix pyqt package name 2016-02-09 10:47:38 +01:00
d873c25b8b Use Qt5 2016-02-08 19:32:40 +01:00
b7de92e96c remove pxi6733 support (now lives at https://github.com/m-labs/aq_ni6733 2016-02-02 18:41:57 +01:00
55b31244ed remove stale dependency on pyelftools 2016-02-02 17:27:29 +01:00
whitequark
5bead8b83f conda: restrict binutils-or1k-linux dependency to linux. 2016-01-27 09:24:54 +00:00
dae63bd10c conda: add artiq-kc705-nist_clock 2016-01-20 21:36:21 -05:00
25ce0928bd build/doc: simplify proxy bitstream locations 2016-01-05 10:23:50 -07:00
whitequark
400999f6ad Revert "conda: use BUILDNUMBER from environment."
This reverts commit ff09a982c5.
2016-01-05 16:06:05 +00:00
whitequark
07ef8906f4 conda: fix buildscripts to get bscan bitstreams correctly. 2016-01-05 15:47:41 +00:00
whitequark
ff09a982c5 conda: use BUILDNUMBER from environment. 2016-01-05 15:46:42 +00:00
57ae630c5c conda: package new, openocd-compatible flash proxy bitstreams 2016-01-05 21:02:13 +08:00
whitequark
407a7d7bf8 conda: remove flterm dependency (#185). 2016-01-05 04:31:02 +00:00
d64d962c3e remove redundant udev rules, update entry points 2016-01-05 10:20:54 +08:00
179c50480f frontend: split coretool into coreconfig, corelog and coreanalyzer 2015-12-24 18:51:11 +08:00
183e855229 remove workaround_asyncio263 2015-12-20 23:26:48 +08:00
whitequark
272480cd26 Revert "conda: give up on build strings in dependencies."
This reverts commit c0e040c4b9.
2015-12-02 21:58:33 +08:00
whitequark
a66b3d9bee conda: add levenshtein dependency. 2015-12-02 19:12:58 +08:00
whitequark
c2ad949d85 conda: add pythonparser dependency. 2015-12-02 18:53:58 +08:00