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168 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 8c1390e557 kasli: use 62.5MHz clock for siphaser reference (#999) 2018-05-12 22:58:03 +08:00
Robert Jördens 7d4a103a43 opticlock, suservo: set default kasli hw_rev 2018-05-07 09:07:18 +02:00
Robert Jördens 5a683ddd1f Revert "kasli: force hw_rev for the different targets" 
This reverts commit 17d7d7856a.

Would require filtering it in misoc or better
removing the argparse option.
 2018-04-28 23:24:41 +02:00
Robert Jördens 17d7d7856a kasli: force hw_rev for the different targets 2018-04-28 21:30:29 +02:00
Robert Jördens 307cd07b9d suservo: lots of gateware/ runtime changes 
tested/validated:

* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback

individual changes below:

suservo: correct rtio readback

suservo: example, device_db [wip]

suservo: change rtio channel layout

suservo: mem ports in rio domain

suservo: sck clocked from rio_phy

suservo: cleanup, straighten out timing

suservo: dds cs polarity

suservo: simplify pipeline

suservo: drop unused eem names

suservo: decouple adc SR from IIR

suservo: expand coredevice layer

suservo: start the correct stage

suservo: actually load ctrl

suservo: refactor/tweak adc timing

suservo: implement cpld and dds init
 2018-04-27 13:50:26 +02:00
Robert Jördens f9b2c32739 suservo: add pgia spi channel 2018-04-25 17:14:25 +00:00
Robert Jördens 37c186a0fc suservo: refactor, constrain 
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
 2018-04-25 13:44:52 +00:00
Robert Jördens d0258b9b2d suservo: set input delays 2018-04-24 15:30:25 +00:00
Robert Jördens 3942c2d274 suservo: fix clkout cd drive 2018-04-24 10:18:32 +00:00
Robert Jördens f74998a5e0 suservo: move arch logic to top, fix tests 2018-04-23 21:11:26 +00:00
Robert Jördens 929ed4471b kasli/SUServo: use suservo, implement urukul_qspi 
m-labs/artiq#788
 2018-04-23 18:30:18 +00:00
Sebastien Bourdeauducq eac447278f kasli: add MITLL variant 2018-04-17 19:00:11 +08:00
Sebastien Bourdeauducq 756e120c27 kasli/sysu: add comments 2018-04-17 18:46:55 +08:00
Sebastien Bourdeauducq 493d2a653f siphaser: add false path between sys_clk and mmcm_freerun_output 2018-03-29 10:55:41 +08:00
Sebastien Bourdeauducq 4229c045f4 kasli: fix DRTIO master clock constraint 2018-03-29 10:20:31 +08:00
Sebastien Bourdeauducq 605292535c kasli: ignore OSERDESE2->ISERDESE2 timing path on DRTIO targets as well 2018-03-29 10:12:02 +08:00
Robert Jördens 770b0a7b79 novogorny: conv -> cnv 
* parity with sampler
* also add novogorny device to opticlock
 2018-03-21 18:38:42 +00:00
Robert Jördens 1afce8c613 kasli: simplify single eem pin formatting 2018-03-21 13:08:42 +01:00
Robert Jördens d48b8f3086 kasli: fix sampler sdr/cnv pins 2018-03-21 09:28:00 +00:00
Robert Jördens 1fb5907362 kasli: add SUServo variant (Sampler-Urukul Servo) 2018-03-21 08:53:26 +00:00
Robert Jördens f74d5772f4 sampler: add wide eem definition 2018-03-21 08:53:26 +00:00
Thomas Harty 37d431039d Fix typos. 
Reduce ififo depth to 4 for Zotino.
 2018-03-19 09:42:18 +00:00
Thomas Harty c4fa44bc62 Add Zotino and Sampler functions to Kasli. Add Zotino to Kasli EEM 7 on OptiClock. 2018-03-18 00:25:43 +00:00
Sebastien Bourdeauducq fc3d97f1f7 drtio: remove spurious multichannel transceiver clock constraints 
They used to cause (otherwise harmless) Vivado critical warnings.
 2018-03-09 22:46:27 +08:00
Sebastien Bourdeauducq caf7b14b55 kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code 2018-03-09 22:36:16 +08:00
Robert Jördens 82831a85b6 kasli/opticlock: add eem6 phys 2018-03-07 21:32:59 +01:00
Sebastien Bourdeauducq 916197c4d7 siphaser: cleanup 2018-03-07 11:15:44 +08:00
Sebastien Bourdeauducq c34d00cbc9 drtio: implement Si5324 phaser gateware and partial firmware support 2018-03-07 10:57:30 +08:00
Robert Jördens 62af7fe2ac Revert "kasli/opticlock: use plain ttls for channels 8-23" 
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.

No decrease in power consumption or improvement in timing.
 2018-03-06 14:27:19 +01:00
Robert Jördens fd3cdce59a kasli/opticlock: use plain ttls for channels 8-23 2018-03-06 14:27:19 +01:00
Robert Jördens 956098c213 kasli: add second urukul, make clk_sel drive optional 2018-03-06 14:26:27 +01:00
Robert Jördens 07de7af86a kasli: make second eem optional in urukul 2018-03-06 14:26:26 +01:00
Sebastien Bourdeauducq a9daaad77b kasli: add SYSU variant and device_db 2018-03-02 14:44:31 +08:00
Sebastien Bourdeauducq 386aa75aaa kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master 2018-02-27 23:18:18 +08:00
Sebastien Bourdeauducq 5d81877b34 kasli: implement multi-link DRTIO on SFP1 and SFP2 of master 2018-02-27 23:15:20 +08:00
Sebastien Bourdeauducq e565d3fa59 kasli: add analyzer and RTIO log to DRTIO master target 2018-02-27 18:09:07 +08:00
Robert Jördens 1452cd7447 novogorny: add coredevice driver and test with Kasli 
m-labs/artiq#687
 2018-02-22 17:19:51 +01:00
Robert Jördens 3b7971d15d kasli: spelling 2018-02-22 17:19:51 +01:00
Sebastien Bourdeauducq fa0d929b4d drtio: reorganize RX synchronizers 2018-02-22 15:21:23 +08:00
Sebastien Bourdeauducq e5de5ef473 kasli: use deterministic RX synchronizer 
Could not reproduce the "fully broken bitstream" bug.
 2018-02-22 15:18:09 +08:00
Robert Jördens a63fd306af urukul: use spi2 
* switch kc705 and kasli targets to spi2 gateware on urukul
* rewrite urukul, ad9912, ad9910
* update example experiments, device_dbs
 2018-02-21 15:00:28 +00:00
Robert Jördens 91a4a7b0ee kasli: free run si5324 on opticlock for now 2018-02-21 13:37:29 +00:00
Robert Jördens 7e02d8245c kasli: false paths 
* don't bother with the round trip OSERDESE2 -> ... -> pad -> ... ->
  ISERDESE2
* clock groups with derived clocks c.f. migen 9c3a301
 2018-02-19 13:05:11 +00:00
Sebastien Bourdeauducq c329c83676 kasli: fix disable_si5324_ibuf no_retiming 2018-02-19 12:19:05 +08:00
Sebastien Bourdeauducq a93decdef2 kasli: disable DRTIO IBUFDS_GTE2 until Si5324 is initialized 2018-02-19 00:48:37 +08:00
Sebastien Bourdeauducq 83abdd283a drtio: signal stable clock input to transceiver 2018-02-18 22:29:30 +08:00
Sebastien Bourdeauducq 039dee4c8e si5324: rename SI5324_FREE_RUNNING to SI5324_AS_SYNTHESIZER 
The previous name was causing confusion with the FREE_RUN bit
that connects the crystal to CLKIN2.
 2018-02-17 13:54:50 +08:00
Sebastien Bourdeauducq cfb21ca126 si5324: fix usage of external CLKIN2 reference 2018-02-17 13:52:01 +08:00
Robert Jördens e41f49cc75 kasli: opticlock 125 MHz, mark external reference case broken 2018-02-16 17:23:15 +00:00
Sebastien Bourdeauducq 4d42df2a7c kasli: set up Si5324 in standalone operation 2018-02-15 20:32:58 +08:00
Robert Jördens be693bc8a9 opticlock: examples 2018-02-13 22:13:40 +01:00
Robert Jördens a3d136d30d opticlock: wire urukul and novogorny 2018-02-13 22:13:40 +01:00
whitequark 61c64a76be gateware: use a per-variant subfolder in --output-dir. (fixes #912) 
This commit also adds support for --variant and --args
to artiq-devtool.
 2018-02-06 08:19:01 +00:00
Sebastien Bourdeauducq 440e19b8f9 kasli: use SFP2 for DRTIO mastering 
SFP1 PCB routing has some issues.

Also use SFP1 LED for DRTIO in both master and satellite.
 2018-01-26 19:02:54 +08:00
Robert Jördens aada38f508 kasli, kc705: remove vivado "keep", cleanup a constraint 2018-01-23 13:15:26 +00:00
Sebastien Bourdeauducq 649deccd9b kasli: fix DRTIO satellite QPLL refclksel 2018-01-23 12:27:19 +08:00
Sebastien Bourdeauducq 763aefacff kasli: fix typo 2018-01-23 12:10:54 +08:00
Sebastien Bourdeauducq c7b148a704 kasli: when using both GTP clocks, send REFCLK0 to PLL0 and REFCLK1 to PLL1 2018-01-23 12:08:10 +08:00
Sebastien Bourdeauducq 9f87c34a94 kasli: fix QPLL instantiation 2018-01-23 10:39:31 +08:00
Sebastien Bourdeauducq 031d7ff020 kasli: keep using second QPLL channel for DRTIO satellite 2018-01-23 10:13:10 +08:00
Sebastien Bourdeauducq aa62e91487 kasli: add DRTIO targets (no firmware) 2018-01-23 01:27:40 +08:00
Sebastien Bourdeauducq 25f3feeda8 refactor targets 2018-01-22 18:25:10 +08:00
Sebastien Bourdeauducq 5198c224a2 sayma,kasli: use new pin names 2018-01-22 11:51:07 +08:00
Sebastien Bourdeauducq cdbf95d46a kasli: fix permissions 2018-01-19 18:31:20 +08:00
Robert Jördens 8ec33ae7bd kasli: feed EEM clock fan-out from SI5324 2018-01-17 17:27:59 +01:00
Robert Jördens ac3c3871d0 kasli: s/extensions/variant/g 2018-01-12 12:29:42 +01:00
Sebastien Bourdeauducq 7c82fcf41a targets: avoid passing cpu_type around unnecessarily 2018-01-11 11:21:55 +08:00
Robert Jördens 8813aee6b1 targets: add kasli [wip, untested] 2018-01-04 16:12:12 +01:00