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Commit Graph

1377 Commits

Author SHA1 Message Date
344f8bd12a wrpll: collector patch from Weida 2020-01-18 09:42:58 +08:00
6c948c7726 sayma: RF switch control is active-low on Basemod, invert 2020-01-16 08:59:52 +08:00
50302d57c0 wrpll: more careful I2C timing 2020-01-14 20:03:46 +08:00
105dd60c78 wrpll: ADPLLProgrammer mini test bench and fixes 2020-01-14 16:52:25 +08:00
3242e9ec6c wrpll: loop test 2020-01-13 22:31:57 +08:00
8ec0f2e717 wrpll: implement ADPLLProgrammer 2020-01-13 22:30:11 +08:00
d685619bcd wrpll: collector code modifications from Weida 2020-01-13 20:42:41 +08:00
a666766f38 wrpll: add ADPLL offset registers 2019-12-30 22:19:42 +08:00
5c6e394928 ddmtd: add collector 2019-12-30 22:17:44 +08:00
f57f235dca wrpll: new frequency meter
As per Mattermost discussion with Tom.
2019-12-30 19:47:57 +08:00
9e15ff7e6a wrpll: improve DDMTD deglitcher 2019-12-30 16:56:06 +08:00
b7f1623197 sayma_rtm: connect attenuator shift registers in series 2019-12-20 18:58:31 +08:00
1c9cbe6285 sayma_rtm: add basemod attenuators on RTIO 2019-12-20 15:25:55 +08:00
6ee15fbcae sayma_rtm: basemod RF switches 2019-12-18 10:33:29 +08:00
52112d54f9 kasli_generic: expose peripheral_processors dictionary. Closes #1403 2019-12-10 10:30:06 +08:00
150a02117c sayma_rtm: drive clk_src_ext_sel 2019-12-09 19:47:50 +08:00
307a6ca140 gth_ultrascale: make OBUFDS_GTE3 work
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
2b5213b013 wrpll: constrain clocks 2019-12-09 12:26:44 +08:00
05e2e1899a wrpll: update OBUFDS_GTE2 comment
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee wrpll: implement filters and connect to Si549 2019-12-09 11:47:29 +08:00
d43fe644f0 wrpll: stabilize DDMTDSamplerGTP 2019-12-09 11:47:14 +08:00
0499f83580 wrpll: helper clock sanity check 2019-12-08 23:46:33 +08:00
46a776d06e sayma: introduce WRPLL on RTM 2019-12-08 15:30:00 +08:00
883310d83e sayma_rtm: si5324 -> cdrclkc 2019-12-08 14:26:05 +08:00
57a5bea43a sayma_rtm: support setting RTIO frequency 2019-12-08 11:45:31 +08:00
da9237de53 wrpll: support differential DDMTD inputs 2019-12-07 18:18:57 +08:00
7098854b0f wrpll: share DDMTD counter 2019-12-04 19:05:56 +08:00
05c5fed07d suservo: stray comma 2019-12-03 08:38:07 +00:00
56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493 kasli_generic: support external reference on masters 2019-11-30 07:34:41 +00:00
eb271f383b wrpll: add DDMTD cores 2019-11-28 22:03:50 +08:00
2e55e39ac7 wrpll: use spaces to indent 2019-11-28 17:40:25 +08:00
354d82cfe3 wrpll: drive helper clock domain 2019-11-28 17:40:00 +08:00
68cab5be8c si549: cleanups 2019-11-28 16:36:59 +08:00
4832bfb08c wrpll: i2c functions, select_recovered_clock placeholder 2019-11-27 21:21:00 +08:00
c536f6c4df sayma_amc: output ddmtd_rec_clk 2019-11-20 19:16:04 +08:00
ae50da09c4 drtio/gth_ultrascale: support OBUFDS_GTE3 2019-11-20 19:15:50 +08:00
fe0c324b38 sayma: integrate si549 core 2019-11-20 17:37:16 +08:00
fa41c946ea wrpll: si549 fixes 2019-11-20 17:04:24 +08:00
c5dbab1929 gateware: move wrpll to drtio 2019-11-20 14:43:08 +08:00
David Nadlinger
bc3b55b1a8 gateware/eem: Force IOB=TRUE on Urukul SYNC output
Without this, the final register in the SYNC signal TTLClockGen
isn't (always) placed in the I/O tile, leading to more jitter
than necessary, and causing "double window" artefacts. See
sinara-hw/Urukul#16 for more details.

(Patch based on work by Weida Zhang, testing by various members
of the community in Oxford and elsewhere.)
2019-11-05 17:14:07 +08:00
98854473dd sayma_amc: use all transceivers on master (#1230) 2019-11-02 12:12:32 +08:00
42af76326f kasli: enlarge integrated CPU SRAM for DRTIO masters
Required by the bootloader netboot support.
2019-11-01 10:15:13 +08:00
228e44a059 sayma: enable Ethernet on DRTIO satellite variant
So that netboot can be used in bootloader.
2019-10-30 21:39:00 +08:00
dc71039934 sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants 2019-10-30 21:36:00 +08:00
462cf5967e bootloader: add netboot support 2019-10-30 21:23:42 +08:00
8fa3c6460e sayma_amc: set direction of external TTL buffer according to RTIO PHY OE 2019-10-16 18:48:50 +08:00
37d0a5dc19 rtio/ttl: expose OE 2019-10-16 18:48:20 +08:00
bc060b7f01 style 2019-10-16 18:18:11 +08:00
21a1c6de3f sayma: use SFP0 for DRTIO master 2019-10-16 17:53:40 +08:00