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Commit Graph

98 Commits

Author SHA1 Message Date
f0e87d2e59 grabber: remove unused code 2019-09-20 15:26:12 +02:00
David Nadlinger
0353966ef7 gateware/suservo: Sign-extend data on RTIO read-back
See GitHub #1327 for original patch by Brad Bondurant.
2019-06-14 23:46:16 +01:00
hartytp
cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface (#1323) 2019-05-17 16:12:35 +01:00
3e8fe3f29d suservo: fix permissions 2019-02-08 14:54:02 +08:00
hartytp
87e85bcc14 suservo: fix coefficient data writing
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 14:47:11 +01:00
David Nadlinger
a565f77538 Add gateware input event counter 2019-01-15 10:55:07 +00:00
0972d61e81 ttl_serdes_ultrascale: use GTH clock domains 2019-01-03 20:50:04 +08:00
4af8fd6a0d ttl_serdes_ultrascale: fix Input 2019-01-03 20:14:54 +08:00
c56c0ba41f rtio/dds: use write-only RT2WB
This saves one address bit and prevents issues with AD9914 and 8-bit addresses.
2018-11-26 07:38:15 +08:00
09141e5bee rtio/wishbone: support write-only interface 2018-11-26 07:38:06 +08:00
450a035f9e suservo: move overflowing RTIO address bits into data 2018-11-26 06:54:20 +08:00
60a7e0e40d grabber: use usual order of ROI coordinates in cfg addresses 2018-07-24 10:55:13 +08:00
7b75026391 grabber: add MultiReg to transfer ROI boundaries 2018-07-21 13:40:12 +08:00
031de58d21 grabber: complete RTIO PHY, untested 2018-07-21 13:25:47 +08:00
82def6b535 grabber: add frequency counter
Cameras are a bit obscure about what they output, this can help with troubleshooting.
2018-07-12 17:05:18 +08:00
4f56710e4b grabber: add parser, report detected frame size in core device log 2018-07-10 02:06:37 +08:00
2612fd1e72 rtio: add grabber deserializer and WIP PHY encapsulation 2018-05-28 22:42:27 +08:00
3027951dd8 integrate new AD9914 driver
moninj, analyzer, docs, examples, tests.
2018-05-13 23:29:35 +08:00
f055bf88f6 suservo: add clip flags (#992) 2018-05-09 07:16:15 +00:00
5f00326c65 suservo: coeff mem write port READ_FIRST 2018-04-27 15:43:32 +00:00
307cd07b9d suservo: lots of gateware/ runtime changes
tested/validated:

* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback

individual changes below:

suservo: correct rtio readback

suservo: example, device_db [wip]

suservo: change rtio channel layout

suservo: mem ports in rio domain

suservo: sck clocked from rio_phy

suservo: cleanup, straighten out timing

suservo: dds cs polarity

suservo: simplify pipeline

suservo: drop unused eem names

suservo: decouple adc SR from IIR

suservo: expand coredevice layer

suservo: start the correct stage

suservo: actually load ctrl

suservo: refactor/tweak adc timing

suservo: implement cpld and dds init
2018-04-27 13:50:26 +02:00
c83305065a suservo: add servo/config/status register 2018-04-25 15:59:06 +00:00
fe75064c1e suservo: cleanup rtio interface 2018-04-24 13:08:40 +00:00
99dd9c7a2a suservo: fix rtio interface width 2018-04-23 18:30:18 +00:00
934c41b90a gateware: add suservo
from
fe4b60b902

m-labs/artiq#788
2018-04-23 18:24:59 +00:00
3a0dfb7fdc ad53xx: port monitor, moninj dashboard, kc705 target 2018-03-24 16:04:02 +01:00
f8c2d54e75 ttl_serdes_ultrascale: configurable SERDES ratio. Also try X4 on Sayma 2018-03-21 13:01:38 +08:00
c8020f6bbd ttl_serdes_generic: fix/upgrade test 2018-03-20 16:46:57 +08:00
a5825184b7 add ttl_serdes_ultrascale (untested) 2018-03-20 16:07:23 +08:00
fad066f1aa ttl_serdes_7series: cleanup indentation
Inconsistent with other code and confuses text editors.
2018-03-20 15:50:04 +08:00
a315ecd10b rtio/ttl_serdes_7series: reset IOSERDES (#958) 2018-03-14 09:01:29 +08:00
6dfebd54dd ttl_serdes_7series: use correct IBUFDS_INTERMDISABLE port names 2018-03-12 10:37:33 +08:00
b0282fa855 spi2: reset configuration in rio_phy 2018-03-07 14:42:11 +00:00
50298a6104 ttl_serdes_7series: suppress diff_term in outputs 2018-03-06 14:27:19 +01:00
e356150ac4 ttl_simple: support differential io 2018-03-06 14:27:19 +01:00
cc70578f1f remove old spi RTIO Phy 2018-03-01 11:19:18 +01:00
f8e6b4f4e3 ad5360: port to spi2
* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db

This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1

m-labs/artiq#926
2018-02-22 10:25:46 +01:00
37a0d6580b spi2: add RTIO gateware and coredevice driver
1006218997
2018-02-21 13:37:36 +00:00
7a1d71502a ttl_serdes_7series: drive IBUF and INTERM disables from serdes 2018-02-21 13:37:29 +00:00
476e4fdd56 ttl_serdes_7series: disable IBUF and INTERM when output 2018-02-21 13:37:29 +00:00
6d20b71dde ttl_serdes_7series: refactor IOSERDES 2018-01-02 13:20:47 +01:00
d5b5076f67 gateware/ad5360_monitor: fix SPI data decoding 2017-10-26 11:58:59 +08:00
412548a86c gateware: add AD5360 monitor (untested) 2017-10-23 20:09:28 +08:00
4fa823b62a gateware: add support for SPI-over-LVDS 2017-10-23 15:04:01 +08:00
3cbbcdfe96 sawg: don't enable_replace for Config
closes #762
2017-06-28 20:31:40 +02:00
f4c6879c76 sawg: special case Config RTIO address 2017-06-22 10:26:29 +02:00
9ab63920e0 Remove Pipistrello support
Closes #658
Closes #381
2017-05-15 17:17:44 +08:00
a7de58b604 rtio: Inout → InOut 2017-03-14 14:18:55 +08:00
86f6b391b7 ad9xxx -> ad9_dds 2017-01-04 11:34:52 +01:00
8381db279f sawg: wire up all HBF outputs, latency compensation in phys, simplify 2016-12-14 19:16:07 +01:00