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71 Commits

Author SHA1 Message Date
SingularitySurfer 2e834cf406 unflip logic.. 2022-06-23 10:20:38 +00:00
SingularitySurfer 3f8a221c76 flip logic of enable bit to bypass bit and update some comments 2022-06-23 10:08:34 +00:00
SingularitySurfer ab097b8ef9 add offset to coefficients as data 2022-06-23 09:37:37 +00:00
SingularitySurfer 24b4ec46bd more documentation 2022-06-23 08:48:28 +00:00
Norman Krackow 56c59e38f0
Update artiq/coredevice/phaser.py 
Co-authored-by: Robert Jördens <rj@quartiq.de>
 2022-06-23 09:15:50 +02:00
SingularitySurfer c0581178d6 impl offsets. to be tested 2022-06-22 16:20:59 +00:00
SingularitySurfer 43c94577ce impl set_iir. untested 2022-06-22 15:35:49 +00:00
SingularitySurfer ce4055db3b force hold on bypass and use names in set_servo() in init 2022-06-21 10:11:49 +00:00
SingularitySurfer b67a70392d rename to coeff base and shorter write16 2022-06-21 09:59:40 +00:00
SingularitySurfer 57176fedb2 add servo docu 2022-06-21 09:29:42 +00:00
SingularitySurfer 8bea821f93 just &1 to stay in field 2022-06-21 08:43:55 +00:00
SingularitySurfer 0388161754 disable servo in init 2022-06-21 07:49:29 +00:00
SingularitySurfer 751af3144e fix old line that I forgot 2022-06-21 07:43:28 +00:00
SingularitySurfer 5df766e6da fix ors 2022-06-21 07:36:59 +00:00
SingularitySurfer d09153411f adress some review comments 2022-06-17 13:03:21 +00:00
Norman Krackow dc49372d57
Update artiq/coredevice/phaser.py 
Co-authored-by: Robert Jördens <rj@quartiq.de>
 2022-06-17 14:40:07 +02:00
Norman Krackow 2044dc3ae5
Update artiq/coredevice/phaser.py 
Co-authored-by: Robert Jördens <rj@quartiq.de>
 2022-06-17 14:39:37 +02:00
SingularitySurfer ae3f1c1c71 adapt servo functions. Todo: docu 2022-06-17 11:47:45 +00:00
SingularitySurfer 1bddadc6e2 cleanup and comments 2022-06-15 17:32:11 +00:00
SingularitySurfer b0f9fd9c4c implement main driver functions 2022-06-15 12:40:21 +00:00
ciciwu 9a96387dfe
phaser: fix docstring formatting (#1866) 2022-03-08 19:03:30 +08:00
Sebastien Bourdeauducq 3c1cbf47d2 phaser: add more slack during init. Closes #1757 2021-10-10 16:18:55 +08:00
Etienne Wodey 4d7bd3ee32 phaser: fail init() if frame timestamp measurement times out 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-03 12:01:26 +02:00
Etienne Wodey 075cb26dd7 phaser: rename get_next_frame_timestamp() to get_next_frame_mu() 
and implement review comments (PR #1749)

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-03 09:58:01 +02:00
Etienne Wodey 7aebf02f84 phaser: docs: add reference to get_next_frame_timestamps(), fix typo 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:44:46 +02:00
Etienne Wodey 61b44d40dd phaser: add labels to debug init prints 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:43:30 +02:00
Etienne Wodey 65f8a97b56 phaser: add helpers to align updates to the RTIO timeline 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:42:54 +02:00
Marius Weber 129cf8c1dd Phaser: Make set_nco_phase set the phase of the NCO 
Previous to this commit `set_nco_phase()` set the phase of the DUC instead
of the NCO. Setting the phase of the NCO may be desirable to utilise the
auto-sync functionality of the double-buffered DAC-NCO settings.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-11 23:16:14 +01:00
Marius Weber 043c9c20d7 phaser: Improve documentation of DAC settings 
1. Clarify which features require additional configuration via the `dac`
   constructor argument.
2. Document when DAC settings apply immediatly/are staged.
3. Document how staged DAC settings may be applied
4. Calrify operation of `dac_sync`

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:58:30 +01:00
Marius Weber f97baa8aec phaser: workaround malformed output with `mixer_ena=1` & `nco_ena=0` 
When Phaser is powered on and `init()` is first called, enabling the
DAC-mixer while leaving the NCO disabled causes malformed output.
This commit implements a workaround by making sure the NCO is enabled,
before being set to the disired state.

This commit also avoids the following procedure, resulting in
malformed output:
1. Operate Phaser with the DAC Mixer and NCO enabled
2. Set the NCO to a non-zero frequency
3. Disable the NCO in the device_db
4. Re-initialise Phaser

After this procedure, with CMIX disabled, incorrect output is produced.
To clear the fault one must re-enable the NCO and write the NCO freqeuncy
to zero before disabling the NCO.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 515cfa7dfb Phaser: expose coarse mixer and document need to enable the DAC-mixer. 
in some use cases a larger tunable range than available via the DUC may
be needed. Some use cases may wish to combine the coarse mixer with the
DUC to extend the tunable range.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 4f812cc4ed Phaser: zero oscillator amplitude after `init()` (close #1651) 
Currently, `init()` leaves a single oscillator at full scale. The phase
accumulator of this oscillator is held continuously cleared. Provided no
upconverting mechanism is active (DUC, CMIX, NCO), this produces a full-scale
DC voltage. The DC voltage is blocked by hardware capacitors. This behaviour
is not mentioned by the `init` documentation.

If one attempts to use any other oscillator without reducing the amplitude
of the oscillator enabled by `init`, there is by significant clipping.

In the case that the NCO or CMIX are configured via the device_db
(suggested in the docs), leaving the osillator at full scale results in
full RF output power after calling `init()`. This may plausibly damage loads
driven by phaser.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 75445fe5f0 Phaser: expose and automate clearing of DAC `sif_sync` (close #1630 and #1650) 
`sif_sync` must be triggered to apply NCO frequency changes. To achieve per
channel frequency tunability exeeding the range of the DUC, the NCO frequeny must
adjusted. User code will need to trigger `sif_sync` to achieve this.

`sif_sync` can only be triggered if the bit was cleared. To avoid this pitfall,
the clearing of `sif_sync` is automated.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 1c96797de5 Phaser upconverter: Follow datasheet procedure for VCO calibration (close #1643) 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber eb477ee06b phaser: print gw_rev in debug mode 2021-05-08 14:48:46 +01:00
Marius Weber c7e992e26d Phaser: flake8 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:46 +01:00
Sebastien Bourdeauducq eb38b664e3 phaser: typo 2021-05-07 10:00:10 +08:00
Robert Jördens 261870bdee phaser: fix oscillator rtio address for even base addresses 
close #1580
 2021-01-19 16:56:50 +01:00
Etienne Wodey ecef5661ce coredevice/phaser: fix typos in docstring 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-10-29 20:27:08 +01:00
Robert Jördens eecd97ce4c phaser: debug and comments 2020-09-27 17:15:16 +00:00
Robert Jördens c453c24fb0 phaser: tweak slacks 2020-09-26 21:16:08 +00:00
Robert Jördens 6c8bddcf8d phaser: tune sync_dly 2020-09-26 21:13:00 +00:00
Robert Jördens 569e5e56cd phaser: autotune and fix fifo_offset 2020-09-26 20:37:16 +00:00
Robert Jördens 2fba3cfc78 phaser: debug init, systematic bring-up 2020-09-25 20:54:59 +00:00
Robert Jördens fec2f8b763 phaser: increase slack for iotest 2020-09-24 10:59:22 +00:00
Robert Jördens 6e6480ec21 phaser: tweak slacks and errors, identify trf 2020-09-24 08:38:30 +00:00
Robert Jördens 03d5f985f8 phaser: another artiq-python signed integer quirk 2020-09-23 15:40:54 +00:00
Robert Jördens 85d16e3e5f phaser: tweaks 2020-09-22 15:27:38 +00:00
Robert Jördens fd5e221898 phaser: dac and trf register maps, init code 2020-09-22 14:08:39 +00:00
Robert Jördens 3e036e365a phaser: nco, settings and init tweaks 2020-09-22 09:52:49 +00:00