M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 1
Code Issues Projects Releases Wiki Activity
8,110 Commits 13 Branches 35 Tags 27 MiB
Commit Graph

966 Commits

Author SHA1 Message Date
occheung d5fa3d131a cargo.lock: update libc version for libfringe 2021-10-16 17:42:24 +08:00
occheung 6d3164a912 riscv: print mtval on panic 2021-10-16 17:42:24 +08:00
occheung 46326716fd runtime: bump libfringe, impl ecall abi 
See libfringe PR: M-Labs/libfringe#1
 2021-10-16 17:42:24 +08:00
occheung 0a59c889de satman/kern: init locked PMP on startup 2021-10-16 17:42:24 +08:00
occheung 27a7a96626 runtime: setup pmp + transfer to user 2021-10-16 17:42:24 +08:00
occheung a0bf11b465 riscv: impl pmp 2021-10-16 17:42:24 +08:00
occheung 790a20edf6 linker: generate stack guard + symbol 2021-10-16 17:42:24 +08:00
Sebastien Bourdeauducq 35d21c98d3 Revert "runtime: expose rint from libm" 
Consistency with NAR3/Zynq where rint is not available.

This reverts commit f5100702f6.
 2021-10-11 08:12:04 +08:00
Sebastien Bourdeauducq f5100702f6 runtime: expose rint from libm 2021-10-10 20:40:17 +08:00
occheung 59065c4663 alloc_list: support alloc w/ large align 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-10-07 12:38:03 +08:00
Sebastien Bourdeauducq 2d79d824f9 firmware: remove minor or1k leftovers 2021-09-12 20:03:37 +08:00
occheung a573dcf3f9 board_misoc/build: use rv32 as target arg 
The original rv64 argument was only to match the misoc counterpart.
 2021-09-10 14:11:23 +08:00
occheung 448974fe11 runtime/main: cleanup 2021-09-10 13:59:53 +08:00
occheung b091d8cb66 kernel: flush cache before mod_init 
This could be necessary as redirecting instructions from D$ directly to I$ as it seems.
Related: https://github.com/SpinalHDL/VexRiscv/issues/137
 2021-09-10 13:25:12 +08:00
occheung b8ed5a0d91 alloc: fix alignment for riscv32 arch 2021-09-10 13:25:12 +08:00
occheung 2213e7ffac ksupp/rtio/exception: fix timestamp 2021-09-10 13:25:12 +08:00
occheung 09ffd9de1e dma: fix timestamp fetch 2021-09-10 13:25:12 +08:00
occheung c6ba0f3cf4 ksupport: fix dma cslice (ffi) 2021-09-10 13:25:12 +08:00
occheung c812a837ab runtime: enlarge stack size 2021-09-10 13:25:12 +08:00
occheung a596db404d satman: fix cargo xbuild sysroot 2021-09-10 13:25:12 +08:00
occheung 4fab267593 cargo: std dependency hack 2021-09-10 13:25:12 +08:00
occheung dcbd9f905c cargo: use cargo xbuild 2021-09-10 13:25:12 +08:00
occheung 9f6b3f6014 firmware: clarify target triple 
The lack of compressed instruction support can be inferred from the target triple, literally.
 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq 6db7280b09 flake: board package WIP 2021-09-10 13:25:12 +08:00
occheung d8ac429059 dyld: streamline lib.rs 
Only riscv32 is supported anyway, no need to have excessive architecture check.
 2021-09-10 13:25:12 +08:00
occheung 798774192d slave_fpga/bootloader: read in little endian 2021-09-10 13:25:12 +08:00
occheung eecd825d23 firmware: suppress warning 2021-09-10 13:25:12 +08:00
occheung 1da0554a49 pcr: purge 2021-09-10 13:25:12 +08:00
occheung 70507e1b72 Cargo.lock: update 2021-09-10 13:25:12 +08:00
occheung c113cd6bf5 libfringe: bump 2021-09-10 13:25:12 +08:00
occheung 61b0170a12 firmware: purge or1k 2021-09-10 13:25:12 +08:00
occheung af263ffe1f ksupport: fix rpc, cache signature (FFI) 
The reason of the borrow stuff is explained in M-Labs/artiq-zynq#76 (artiq-zyna repo).
As for `cache_get()`, compiler will perform stack allocation to pre-allocate the returned structure, and pass to cache_get alongside the `key`.
However, ksupport fails to recognize the passed memory, so it will always assume the passed memory as the key.
 2021-09-10 13:25:12 +08:00
occheung 8fa47b8119 rpc: enforce alignment 2021-09-10 13:25:12 +08:00
occheung de0f2d4a28 firmware: adopt endianness protocol in artiq-zynq 
Related:
artiq-zynq: M-Labs/artiq-zynq#126
artiq: #1588
 2021-09-10 13:25:12 +08:00
occheung 9afe63c08a ksupport: fix proto_artiq dependency 2021-09-10 13:25:12 +08:00
occheung 29a2f106d1 ksupport: replace asm with llvm_asm 2021-09-10 13:25:12 +08:00
occheung 279593f984 ksupport.ld: merge sbss with bss 2021-09-10 13:25:12 +08:00
occheung 1ba8c8dfee runtime: remove irq again 2021-09-10 13:25:12 +08:00
occheung 3d629006df makefiles: revert byte-swaps 2021-09-10 13:25:12 +08:00
occheung 7542105f0f board_misoc: remove pcr 
VexRiscv seems to not support additional hardware performance counter, at least I have not seen any documentation on how to use it.
 2021-09-10 13:25:12 +08:00
occheung 01ca114c66 runtime: remove irq dependency 2021-09-10 13:25:12 +08:00
occheung 36171f2c61 runtime: remove inaccurate sp on panic 2021-09-10 13:25:12 +08:00
occheung 01e357e5d3 ksupport.ld: reduce load section alignment 2021-09-10 13:25:12 +08:00
occheung 1293e0750e ld, makefiles: use ld.lld 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq 5656e52581 remove profiler 2021-09-10 13:25:12 +08:00
occheung 1b8b4baf6a ksupport: fix panic, libc, unwind 2021-09-10 13:25:12 +08:00
occheung 905330b0f1 ksupport: handle riscv exceptions 2021-09-10 13:25:12 +08:00
occheung 50a62b3d42 liballoc: change align to 16 bytes 2021-09-10 13:25:12 +08:00
occheung 7f0bc9f7f0 runtime/makefile: specify emulation, flip endianness 2021-09-10 13:25:12 +08:00
occheung c42adfe6fd runtime.ld: merge .sbss & .bss 2021-09-10 13:25:12 +08:00
occheung f56152e72f rust: fix dependencies 2021-09-10 13:25:12 +08:00
occheung c800b6c8d3 runtime: update rust alloc, managed 2021-09-10 13:25:09 +08:00
occheung e99061b013 runtime: add riscv 2021-09-10 13:23:22 +08:00
occheung ecedec577c runtime: impl riscv exception handling 2021-09-10 13:23:15 +08:00
occheung 252594a606 runtime: impl riscv panic handler 2021-09-10 13:20:31 +08:00
occheung 31bf17563c personality: update from rust/panic_unwind 2021-09-10 13:20:31 +08:00
occheung bfddd8a30f libdyld: add riscv support 2021-09-10 13:20:31 +08:00
occheung ad3037d0f6 libc: add minimal C types 2021-09-10 13:20:31 +08:00
occheung daaf6c3401 libunwind: add rust interface 2021-09-10 13:20:31 +08:00
occheung 6d9cebfd42 satman: handle .sbss generation 2021-09-10 13:20:31 +08:00
occheung 96438c9da7 satman: make fbi big-endian 2021-09-10 13:20:31 +08:00
occheung 6535b2f089 satman: fix feature 2021-09-10 13:20:31 +08:00
occheung 45adaa1d98 satman: add riscv exception handling 2021-09-10 13:20:31 +08:00
occheung 869a282410 satman: use riscv 2021-09-10 13:20:31 +08:00
occheung ebb9f298b5 proto_artiq: update alloc type path 2021-09-10 13:20:31 +08:00
occheung 97a0132f15 libio: update alloc type path 2021-09-10 13:20:31 +08:00
occheung 37ea863004 libio: pin failure version 2021-09-10 13:20:31 +08:00
occheung 3ff74e0693 bootloader: handle .sbss generation in .ld 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung 448fe0e8cf bootloader: fix panic 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung 8294d7fea5 bootloader: swap endianness 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung 13032272fd bootloader: add rv32 exception handler 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung 46102ee737 board_misoc: build vectors.S with rv64 target in misoc 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung b87ea79d51 rv32: rm irq & vexriscv-rust 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung 9aee42f0f2 rv32/boot: remove hotswap 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung 82b4052cd6 libboard_misoc: vexriscv integration 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
Sebastien Bourdeauducq 420891ba54 syntax 2021-08-12 13:01:35 +08:00
Sebastien Bourdeauducq 9f94bc61ae missing part of 477b1516d 2021-08-12 12:55:37 +08:00
Sebastien Bourdeauducq 477b1516d3 remove profiler 2021-08-12 12:51:55 +08:00
Star Chen 5111132ef0
ICAP: prevent sayma from using it (#1740) 2021-08-06 15:08:30 +08:00
Star Chen 6b88ea563d
talk to ICAP primitive to restart gateware (#1733) 2021-08-05 17:00:31 +08:00
Sebastien Bourdeauducq ea0c7b6173 Merge remote-tracking branch 'harrydrtio/k7-drtio' 2021-06-15 10:04:45 +08:00
Sebastien Bourdeauducq 92fd705990 increase memory allocated to comms CPU 
See discussion in #1612.
 2021-02-21 19:06:12 +08:00
Sebastien Bourdeauducq 14d464b4cf update copyright year 2021-02-17 15:52:08 +08:00
pca006132 8148fdb8a7
use device endian for core device protocols (#1591) 2021-01-22 16:33:21 +08:00
pca006132 3832b261b1 firmware: optimize integer array/list rpc 2021-01-21 09:05:17 +01:00
Harry Ho f6d39fd6ba kc705: revive DRTIO master with updated syntax 
* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
 2021-01-20 15:05:31 +08:00
Chris Ballance 43be383c86 kasli v2.0: drive TX_DISABLE low on all SFPs (fixes #1570) 
This was the same problem as #1508 but on SFP1..3
 2020-12-23 00:10:12 +08:00
Harry Ho 73271600a1 jdcg: STPL tests now perform after DAC initialization 2020-12-14 18:03:31 +08:00
David Nadlinger d95e619567 compiler: Implement binary NumPy math functions (arctan2, …) 
The bulk of the diff is just factoring out the implementation
for binary arithmetic implementations, to be reused for binary
function calls.
 2020-11-11 01:35:28 +01:00
David Nadlinger bc6fbecbda compiler, firmware: Do not expose abort() to kernels 
This was only exposed for the assert implementation, and
does not exist on Zynq.
 2020-11-10 20:40:18 +01:00
Sebastien Bourdeauducq ea95d91428 wrpll: separate collector reset 2020-11-09 17:57:13 +08:00
Sebastien Bourdeauducq 90017da484 firmware: remove obsolete watchdog code (#1458) 2020-10-15 18:38:00 +08:00
Sebastien Bourdeauducq 57ee57e7ea runtime: fix metlino si5324 init (2) 2020-10-14 18:41:56 +08:00
Sebastien Bourdeauducq ac35548d0f runtime: fix metlino si5324 init 2020-10-14 12:57:25 +08:00
Sebastien Bourdeauducq 35c61ce24d si5324: unify N31 settings when used as synthesizer 
Closes #1528
 2020-10-12 14:45:52 +08:00
hartytp e6ff2ddc32 wrpll: add more diagnostics in firmware and adapt to recent gateware changes 2020-10-08 15:32:27 +08:00
Sebastien Bourdeauducq 9214e0f3e2 firmware: fix Si5324 CKIN selection on Kasli 2.0 
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
 2020-10-02 20:35:32 +08:00
pca006132 aac2194759 Ported rpc changes to or1k 2020-08-26 14:17:06 +08:00
Paweł Kulik eb350c3459 Drive SFP0 TX_DISABLE low during startup (as was in Kasli v1.1). Fixes Ethernet on SFP modules with pullup on this line. 
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
 2020-08-24 21:39:53 +08:00
Sebastien Bourdeauducq d8cd5023f6 runtime: expose more libm functions 2020-08-12 13:36:06 +08:00