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92 Commits (master)

Author SHA1 Message Date
mwojcik b168f0bb4b subkernel: separate tags and data 2023-10-17 12:18:03 +02:00
mwojcik 0a750c77e8 compiler: support subkernels 2023-10-08 17:11:51 +08:00
pca006132 6ec003c1c9 compiler: fixed dead code eliminator 
Instead of removing basic blocks with no predecessor, we will now mark
and remove all blocks that are unreachable from the entry block. This
can handle loops that are dead code. This is needed as we will now
generate more complicated code for exception handling which the old dead
code eliminator failed to handle.
 2022-01-26 07:16:54 +08:00
pca006132 da4ff44377 compiler: fixed try codegen and allocate exceptions 
Exceptions are now allocated in the runtime when we raise the exception,
and destroyed when we exit the catch block. Nested exception and try
block is now supported, and should behave the same as in CPython.
Exceptions raised in except blocks will now unwind through finally
blocks, matching the behavior in CPython. Reraise will now preserve
backtrace.

Phi block LLVM IR generation is modified to handle landingpads, which
one ARTIQ IR will map to multiple LLVM IR.
 2022-01-26 07:16:54 +08:00
pca006132 6542b65db3 compiler: fixed exception codegen issues 2022-01-10 15:54:29 +08:00
pca006132 9f90088fa6 compiler: generate appropriate landingpad IR 
When used together with modified personality function, we got ~20%
performance improvement in exception unwinding with zynq.
 2022-01-10 15:54:29 +08:00
David Nadlinger 8783ba2072 compiler/firmware: RPCs for ndarrays 2020-08-09 17:08:43 +01:00
David Nadlinger 9af6e5747d compiler: Factor rpc_tag() out of llvm_ir_generator 2020-08-09 03:54:41 +01:00
David Nadlinger dea3c0c572 compiler: Don't store redundant ndarray buffer length, match list layout 
This adds `elt` to _TPointer and the ir.Offset IR instruction,
which is like GetElem but without the final load.
 2020-08-09 03:54:41 +01:00
whitequark ce3c8fcd3e compiler: add source location to SSA arguments. 
Fixes #1006.
 2018-05-22 18:14:14 +00:00
whitequark fd110e9848 compiler: sort predecessors in IR dump output. 
Makes diffs more useful.
 2018-05-19 17:02:08 +00:00
whitequark dc1c4ebf1d compiler: use ARTIQ_IR_NO_LOC variable to control IR dump output. 
Useful e.g. in tests or for running diff on irgen output.
 2018-05-19 17:02:08 +00:00
whitequark fd8b11532f compiler, firmware: use Pascal strings everywhere. 
This removes a large amount of very ugly code, and also simplifies
the compiler and runtime.
 2017-02-03 11:53:27 +00:00
whitequark c50d436f0b ir: `invoke` is a valid `delay` decomposition. 
Fixes #510.
 2016-07-13 08:48:31 +00:00
whitequark 1464bae6b7 compiler: don't typecheck RPCs except for return type. 
Fixes #260.
 2016-04-26 01:12:36 +00:00
whitequark a57aabb3ea compiler: purge generated functions from backtraces. 2016-04-02 18:29:36 +00:00
whitequark 1038f1321f compiler: allow specifying per-function "fast-math" flags. 
Fixes #351.
 2016-03-28 21:44:08 +00:00
whitequark e75ad3d1aa compiler: extract runtime checks into separate cold functions. 
This reduces register pressure as well as function size, which
favorably affects the inliner.
 2016-03-27 01:02:15 +00:00
whitequark 3ee9834197 compiler: significantly increase readability of LLVM and ARTIQ IRs. 2016-03-26 12:21:02 +00:00
whitequark 39599d4508 compiler: get rid of the GetConstructor opcode. 2016-03-25 19:01:39 +00:00
whitequark 51a5910002 Rename 'with parallel' to 'with interleave' (#265). 2016-02-22 13:24:43 +00:00
whitequark 2a474b7166 ir: fix incoming_{blocks,values,value_for_block}. 2015-12-30 16:06:18 +08:00
whitequark f52d364806 Mollify PEP 0479. 2015-12-30 15:33:30 +08:00
whitequark 082e9e20dd compiler: do not associate SSA values with iodelay even when inlining. 
Fixes #201.
 2015-12-25 15:02:33 +08:00
whitequark 33c3b3377e ir: keep loc when copying. 2015-12-25 14:59:28 +08:00
whitequark 0395efd479 compiler: give environment types in LLVM IR readable names. 2015-12-18 23:41:51 +08:00
whitequark 8cb7844621 transforms.interleaver: unroll loops. 2015-12-17 00:52:22 +08:00
whitequark f8eaeaa43f compiler: explicitly represent loops in IR. 2015-12-16 15:33:26 +08:00
whitequark 8751d2ee6c Delay.{expr→interval}. 2015-12-16 13:57:02 +08:00
whitequark 2a82eb7219 compiler.ir: return dict from Delay.substs, not pair iterable. 2015-11-24 00:01:10 +08:00
whitequark f3da227e2d compiler.ir: change argument order for BasicBlock.insert. 2015-11-23 23:59:25 +08:00
whitequark f0fd6cd0ca compiler.algorithms.inline: implement. 2015-11-23 23:58:37 +08:00
whitequark a4525b21cf compiler.ir: print even blocks without predecessors. 2015-11-23 23:55:12 +08:00
whitequark d92b3434a0 compiler.ir: print basic blocks in reverse postorder for readability. 2015-11-23 21:44:38 +08:00
whitequark c73b2c1a78 compiler.ir: fix typo. 2015-11-23 21:21:01 +08:00
whitequark 0bf425eefa compiler.ir: maintain use lists while mutating instructions. 2015-11-23 19:18:58 +08:00
whitequark cb3b811fd7 compiler: maintain both the IR and iodelay forms of delay expressions. 
After this commit, the delay instruction (again) does not generate
any LLVM IR: all heavy lifting is relegated to the delay and delay_mu
intrinsics. When the interleave transform needs to adjust the global
timeline, it synthesizes a delay_mu intrinsnic. This way,
the interleave transformation becomes composable, as the input and
the output IR invariants are the same.

Also, code generation is adjusted so that a basic block is split off
not only after a delay call, but also before one; otherwise, e.g.,
code immediately at the beginning of a `with parallel:` branch
would have no choice but to execute after another branch has already
advanced the timeline.

This takes care of issue #1 described in 50e7b44 and is a step
to solving issue #2.
 2015-11-21 03:22:47 +08:00
whitequark 00ec574d73 transforms.interleaver: implement (without inlining). 2015-11-20 00:03:26 +08:00
whitequark de9d7eb2e4 compiler: add `delay` IR instruction. 2015-11-17 05:16:43 +03:00
whitequark fd46690cf5 compiler: make IR dumps vastly more readable. 2015-11-17 00:23:34 +03:00
whitequark b91ffa1b38 ir: fix default argument fiasco. 2015-10-14 17:02:59 +03:00
whitequark 32ce33a1f9 transforms.artiq_ir_generator: emit ir.Parallel for with parallel:. 2015-10-09 03:10:39 +03:00
whitequark 0bb793199f transforms.artiq_ir_generator: devirtualize closure calls. 2015-10-09 01:32:27 +03:00
whitequark 2ca84f9fea Highlight source range in IR dumps using colors. 2015-10-04 02:11:17 +03:00
whitequark 9b9fa1ab7c Allow embedding and RPC sending host objects. 2015-08-25 21:56:01 -07:00
whitequark a557445e05 LocalAccessValidator: assume variables with "$" in name are internal. 
Internal variables are assumed to be scoped correctly
(including not being accessed uninitialized).

This was changed from "." because artiq.compiler.embedding uses
"." in module prefix of function names.
 2015-08-22 13:56:17 -07:00
whitequark 94a2d5f5fa Implement class attribute access through instances. 2015-08-15 11:07:54 -04:00
whitequark 00efc8c636 Implement class definitions and class attribute access. 2015-08-15 09:45:16 -04:00
whitequark 8f510a4407 compiler.ir.Function: add loc field. 2015-08-10 13:14:52 +03:00
whitequark d7f9af4bb5 Fix accidentally quadratic code in compiler.ir.Function._add_name. 2015-07-29 21:36:31 +03:00