M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 1
Code Issues Projects Releases Wiki Activity

sawg: stage code for y-data exchange on channels

This commit is contained in:
Robert Jördens 2017-06-21 13:10:09 +02:00
parent b6569df02f
commit ff0da2c9fc
1 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
artiq/gateware/targets/phaser.py
View File

@ -142,6 +142,11 @@ class AD9154(Module, AutoCSR):
self.sawgs = [sawg.Channel(width=16, parallelism=2) for i in range(4)]
self.submodules += self.sawgs
# self.sawgs[0].connect_y(self.sawgs[1])
# self.sawgs[1].connect_y(self.sawgs[0])
# self.sawgs[2].connect_y(self.sawgs[3])
# self.sawgs[3].connect_y(self.sawgs[2])
for conv, ch in zip(self.jesd.core.sink.flatten(), self.sawgs):
self.sync.jesd += conv.eq(Cat(ch.o))