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test_ad9910: don't expect large SYNC_IN delay margins
sinara-hw/Urukul#16 Signed-off-by: Robert Jördens <rj@quartiq.de>
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@ -82,7 +82,9 @@ class AD9910Exp(EnvExperiment):
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print(err)
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self.core.break_realtime()
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dly, win = self.dev.tune_sync_delay()
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self.sync_scan(err, win=win + 1) # tighten window by 2*75ps
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self.sync_scan(err, win=win)
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# FIXME: win + 1 # tighten window by 2*75ps
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# after https://github.com/sinara-hw/Urukul/issues/16
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self.set_dataset("dly", dly)
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self.set_dataset("win", win)
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self.set_dataset("err", err)
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