examples: fix dds_test RTIO underflow

2024-12-28 20:53:35 +08:00 · 2017-02-27 11:45:18 +08:00 · 2017-02-27 11:45:18 +08:00 · fc0ce310a8
commit fc0ce310a8
parent 26654e6a3a
1 changed files with 1 additions and 0 deletions
--- a/artiq/examples/master/repository/coredevice_examples/simple/dds_test.py
+++ b/artiq/examples/master/repository/coredevice_examples/simple/dds_test.py
@ -18,6 +18,7 @@ class DDSTest(EnvExperiment):
    @kernel
    def run(self):
        self.core.reset()
+        delay(200*us)
        with self.core_dds.batch:
            self.dds1.set(120*MHz)
            self.dds2.set(200*MHz)