From f8a94725e9a1aa28cafaca7d4df907b5a8775142 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Wed, 9 Jan 2019 18:58:22 +0800 Subject: [PATCH] manual: add precision about sequence errors --- doc/manual/rtio.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/doc/manual/rtio.rst b/doc/manual/rtio.rst index ce69b2bcd..24e352131 100644 --- a/doc/manual/rtio.rst +++ b/doc/manual/rtio.rst @@ -126,7 +126,8 @@ Internally, the gateware stores output events in an array of FIFO buffers (the " Notes: * Strictly increasing timestamps never cause sequence errors. -* Configuring the gateware with more lanes for the RTIO core reduces the frequency of sequence errors. +* Configuring the gateware with more lanes for the RTIO core reduces the frequency of sequence errors. +* The number of lanes is a hard limit on the number of simultaneous RTIO output events. * Whether a particular sequence of timestamps causes a sequence error or not is fully deterministic (starting from a known RTIO state, e.g. after a reset). Adding a constant offset to the whole sequence does not affect the result. The offending event is discarded and the RTIO core keeps operating.