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drtio: squelch 7series RXSynchronizer outputs when MMCM is unlocked

This commit is contained in:
Sebastien Bourdeauducq 2016-11-04 15:16:48 +08:00
parent 6a75837261
commit f76aa249ce
1 changed files with 4 additions and 2 deletions
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6
artiq/gateware/drtio/transceiver/gtx_7series.py
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@ -212,10 +212,11 @@ class RXSynchronizer(Module, AutoCSR):
self.phase_shift = CSR() self.phase_shift = CSR()
self.phase_shift_done = CSRStatus() self.phase_shift_done = CSRStatus()
self.clock_domains.cd_rtio_delayed = ClockDomain(reset_less=True) self.clock_domains.cd_rtio_delayed = ClockDomain()
mmcm_output = Signal() mmcm_output = Signal()
mmcm_fb = Signal() mmcm_fb = Signal()
mmcm_locked = Signal()
# maximize VCO frequency to maximize phase shift resolution # maximize VCO frequency to maximize phase shift resolution
mmcm_mult = 1200e6//rtio_clk_freq mmcm_mult = 1200e6//rtio_clk_freq
self.specials += [ self.specials += [
@ -242,7 +243,8 @@ class RXSynchronizer(Module, AutoCSR):
i_PSINCDEC=self.phase_shift.r, i_PSINCDEC=self.phase_shift.r,
o_PSDONE=self.phase_shift_done.status, o_PSDONE=self.phase_shift_done.status,
), ),
Instance("BUFR", i_I=mmcm_output, o_O=self.cd_rtio_delayed.clk) Instance("BUFR", i_I=mmcm_output, o_O=self.cd_rtio_delayed.clk),
AsyncResetSynchronizer(self.cd_rtio_delayed, ~mmcm_locked)
] ]
def resync(self, signal): def resync(self, signal):