From f763b519f4b37af2dad45697d5bdfac9751a319e Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Wed, 26 Oct 2016 00:33:21 +0800 Subject: [PATCH] drtio: fix channel selection --- artiq/gateware/drtio/iot.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/artiq/gateware/drtio/iot.py b/artiq/gateware/drtio/iot.py index 85367adc3..d7ba41c78 100644 --- a/artiq/gateware/drtio/iot.py +++ b/artiq/gateware/drtio/iot.py @@ -46,9 +46,10 @@ class IOT(Module): rt_packets.fifo_space.eq(channel.ofifo_depth - fifo.level)) # FIFO write - self.comb += fifo.we.eq(rt_packets.write_stb) + self.comb += fifo.we.eq(rt_packets.write_stb + & (rt_packets.write_channel == n)) self.sync += \ - If(rt_packets.write_stb, + If(fifo.we, If(rt_packets.write_overflow_ack, rt_packets.write_overflow.eq(0)), If(~fifo.writable, rt_packets.write_overflow.eq(1)),