mirror of https://github.com/m-labs/artiq.git
drtio: fix satellite RX data corruption
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@ -183,7 +183,7 @@ class Satellite(BaseSoC):
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else:
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raise ValueError
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self.submodules.rx_synchronizer = gtx_7series.RXSynchronizer(
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self.transceiver.rtio_clk_freq)
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self.transceiver.rtio_clk_freq, initial_phase=180.0)
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self.submodules.drtio = DRTIOSatellite(
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self.transceiver, self.rx_synchronizer, rtio_channels)
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self.csr_devices.append("rx_synchronizer")
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