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https://github.com/m-labs/artiq.git
synced 2024-12-25 11:18:27 +08:00
remove sayma_masterdac example
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parent
72f7f8386f
commit
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@ -1,152 +0,0 @@
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core_addr = "sayma-1.lab.m-labs.hk"
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device_db = {
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"core": {
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {"host": core_addr, "ref_period": 1/(8*150e6)}
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},
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"core_log": {
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"type": "controller",
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"host": "::1",
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"port": 1068,
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"command": "aqctl_corelog -p {port} --bind {bind} " + core_addr
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},
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"core_cache": {
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache"
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},
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"core_dma": {
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"type": "local",
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"module": "artiq.coredevice.dma",
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"class": "CoreDMA"
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},
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"led0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 0},
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},
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"led1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 1},
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},
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"led2": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 2},
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},
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"led3": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 3},
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},
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"ttl_sma_out": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 4}
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},
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"ttl_sma_in": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 5}
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},
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"rled0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 0x010000},
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},
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"rled1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 0x010001},
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},
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"rled2": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 0x010002},
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},
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"rled3": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 0x010003},
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},
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"rttl_sma_out": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 0x010004}
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},
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"rttl_sma_in": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 0x010005}
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},
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"converter_spi": {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "NRTSPIMaster",
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},
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"ad9154_spi0": {
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"type": "local",
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"module": "artiq.coredevice.ad9154_spi",
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"class": "AD9154",
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"arguments": {"spi_device": "converter_spi", "chip_select": 2}
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},
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"ad9154_spi1": {
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"type": "local",
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"module": "artiq.coredevice.ad9154_spi",
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"class": "AD9154",
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"arguments": {"spi_device": "converter_spi", "chip_select": 3}
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},
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"rconverter_spi": {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "NRTSPIMaster",
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"arguments": {"busno": 0x010000}
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},
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"rad9154_spi0": {
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"type": "local",
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"module": "artiq.coredevice.ad9154_spi",
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"class": "AD9154",
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"arguments": {"spi_device": "rconverter_spi", "chip_select": 2}
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},
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"rad9154_spi1": {
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"type": "local",
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"module": "artiq.coredevice.ad9154_spi",
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"class": "AD9154",
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"arguments": {"spi_device": "rconverter_spi", "chip_select": 3}
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},
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}
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for i in range(8):
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device_db["sawg" + str(i)] = {
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"type": "local",
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"module": "artiq.coredevice.sawg",
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"class": "SAWG",
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"arguments": {"channel_base": i*10+6, "parallelism": 4}
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}
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for i in range(8):
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device_db["sawg" + str(8+i)] = {
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"type": "local",
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"module": "artiq.coredevice.sawg",
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"class": "SAWG",
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"arguments": {"channel_base": i*10+0x010006, "parallelism": 4}
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}
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@ -1,23 +0,0 @@
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from artiq.coredevice.ad9154_reg import *
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from artiq.experiment import *
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class Test(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.ad9154_spi = self.get_device("ad9154_spi0")
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self.rad9154_spi = self.get_device("rad9154_spi0")
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@kernel
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def run(self):
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self.ad9154_spi.setup_bus()
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self.rad9154_spi.setup_bus()
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for i in range(5):
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self.p("local PRODID: 0x%04x", (self.ad9154_spi.read(AD9154_PRODIDH) << 8) |
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self.ad9154_spi.read(AD9154_PRODIDL))
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self.p("remote PRODID: 0x%04x", (self.rad9154_spi.read(AD9154_PRODIDH) << 8) |
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self.rad9154_spi.read(AD9154_PRODIDL))
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def p(self, f, *a):
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print(f % a)
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@ -1,27 +0,0 @@
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from artiq.experiment import *
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class BlinkForever(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.rleds = [self.get_device("rled" + str(i)) for i in range(4)]
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self.leds = [self.get_device("led" + str(i)) for i in range(4)]
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@kernel
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def run(self):
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self.core.reset()
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while True:
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with parallel:
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for led in self.leds:
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led.pulse(250*ms)
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for led in self.rleds:
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led.pulse(250*ms)
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t = now_mu()
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for led in self.leds:
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at_mu(t)
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led.pulse(500*ms)
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for led in self.rleds:
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at_mu(t)
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led.pulse(500*ms)
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delay(250*ms)
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@ -1,25 +0,0 @@
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from artiq.experiment import *
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class PulseRate(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("rttl_sma_out")
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@kernel
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def run(self):
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self.core.reset()
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dt = self.core.seconds_to_mu(300*ns)
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while True:
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for i in range(10000):
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try:
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self.rttl_sma_out.pulse_mu(dt)
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delay_mu(dt)
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except RTIOUnderflow:
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dt += 1
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self.core.break_realtime()
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break
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else:
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print(self.core.mu_to_seconds(dt))
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return
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@ -1,32 +0,0 @@
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from artiq.experiment import *
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class SAWGTestDRTIO(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("ttl_sma_out")
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self.sawgs = [self.get_device("sawg"+str(i)) for i in range(16)]
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@kernel
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def run(self):
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core_log("waiting for DRTIO ready...")
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for i in range(3):
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while not self.core.get_rtio_destination_status(i):
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pass
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core_log("OK")
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self.core.reset()
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for sawg in self.sawgs:
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delay(1*ms)
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sawg.reset()
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for sawg in self.sawgs:
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delay(1*ms)
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sawg.amplitude1.set(.4)
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# Do not use a sub-multiple of oscilloscope sample rates.
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sawg.frequency0.set(9*MHz)
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while True:
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delay(0.5*ms)
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self.ttl_sma_out.pulse(0.5*ms)
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