mirror of https://github.com/m-labs/artiq.git
CoreException: store at 'py_exn.artiq_core_exception'
... and fix a few imports
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parent
0d7dc7b144
commit
f4c7f02127
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@ -457,8 +457,8 @@ class CommGeneric:
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self._write_header(_H2DMsgType.RPC_EXCEPTION)
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if hasattr(exn, 'core_exception'):
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exn = exn.core_exception
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if hasattr(exn, 'artiq_core_exception'):
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exn = exn.artiq_core_exception
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self._write_string(exn.name)
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self._write_string(exn.message)
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for index in range(3):
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@ -504,15 +504,15 @@ class CommGeneric:
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traceback = list(reversed(symbolizer(backtrace))) + \
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[(filename, line, column, function, None)]
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core_exception = exceptions.CoreException(name, message, params, traceback)
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core_exn = exceptions.CoreException(name, message, params, traceback)
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if core_exception.id == 0:
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python_exn_type = getattr(exceptions, core_exception.name.split('.')[-1])
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if core_exn.id == 0:
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python_exn_type = getattr(exceptions, core_exn.name.split('.')[-1])
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else:
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python_exn_type = object_map.retrieve(core_exception.id)
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python_exn_type = object_map.retrieve(core_exn.id)
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python_exn = python_exn_type(message.format(*params))
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python_exn.core_exception = core_exception
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python_exn.artiq_core_exception = core_exn
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raise python_exn
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def serve(self, object_map, symbolizer):
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@ -1,4 +1,8 @@
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import builtins
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import linecache
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import re
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import os
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from artiq.coredevice.runtime import source_loader
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@ -132,8 +132,8 @@ def run(with_file=False):
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except CompileError as error:
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return
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except Exception as exn:
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if hasattr(exn, 'core_exception'):
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print(exn.core_exception, file=sys.stderr)
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if hasattr(exn, 'artiq_core_exception'):
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print(exn.artiq_core_exception, file=sys.stderr)
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raise exn
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finally:
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device_mgr.close_devices()
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@ -2,7 +2,6 @@
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Core ARTIQ extensions to the Python language.
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"""
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import os, linecache, re
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from collections import namedtuple
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from functools import wraps
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