test: check that DMA can underflow

2017-10-31 00:10:13 +08:00 · 2017-10-31 00:10:13 +08:00 · f3f83174b1
parent 0695afec37
commit f3f83174b1
1 changed files with 6 additions and 0 deletions
--- a/artiq/test/coredevice/test_rtio.py
+++ b/artiq/test/coredevice/test_rtio.py
@ -634,6 +634,12 @@ class DMATest(ExperimentCase):
        print("dt={}, dt/count={}".format(dt, dt/count))
        self.assertLess(dt/count, 4.5*us)

+    def test_dma_underflow(self):
+        exp = self.create(_DMA)
+        exp.record()
+        with self.assertRaises(RTIOUnderflow):
+            exp.playback_many(20000)
+
    def test_handle_invalidation(self):
        exp = self.create(_DMA)
        for mode in [0, 1]: