slave_fpga: disable cclk and din drive when done

to guard against accidental contention (old rtm gateware
but #813 rework done)

artiq/firmware/libboard_artiq/slave_fpga.rs

@@ -81,6 +81,7 @@ pub fn load() -> Result<(), &'static str> {
         }
         shift_u8(0xff);  // "Compensate for Special Startup Conditions"
         csr::slave_fpga_cfg::out_write(PROGRAM_B_BIT);
+        csr::slave_fpga_cfg::oe_write(PROGRAM_B_BIT);
     }
 
     Ok(())