M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity

rtio/dma: remove dead/broken code

This commit is contained in:
Sebastien Bourdeauducq 2020-07-12 10:13:18 +08:00
parent 901be75ba4
commit f2e0d27334
1 changed files with 1 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
artiq/gateware/rtio/dma.py
View File

@ -12,9 +12,7 @@ def _reverse_bytes(s, g):
class WishboneReader(Module): class WishboneReader(Module):
def __init__(self, bus=None): def __init__(self):
if bus is None:
bus = wishbone.Interface
self.bus = bus self.bus = bus
aw = len(bus.adr) aw = len(bus.adr)