From f281112779606f279a3f8dde05a25b71080082fb Mon Sep 17 00:00:00 2001
From: mwojcik <mw@m-labs.hk>
Date: Fri, 3 Dec 2021 11:22:15 +0800
Subject: [PATCH] satman: add 100mhz si5324 settings siphaser: add calculated
 vco for 100mhz comment

---
 artiq/firmware/satman/main.rs    | 13 +++++++++++++
 artiq/gateware/drtio/siphaser.py |  2 +-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/artiq/firmware/satman/main.rs b/artiq/firmware/satman/main.rs
index e0ec83612..c6685f895 100644
--- a/artiq/firmware/satman/main.rs
+++ b/artiq/firmware/satman/main.rs
@@ -447,6 +447,19 @@ const SI5324_SETTINGS: si5324::FrequencySettings
     crystal_ref: true
 };
 
+#[cfg(all(has_si5324, rtio_frequency = "100.0"))]
+const SI5324_SETTINGS: si5324::FrequencySettings
+    = si5324::FrequencySettings {
+    n1_hs  : 5,
+    nc1_ls : 10,
+    n2_hs  : 10,
+    n2_ls  : 250,
+    n31    : 50,
+    n32    : 50,
+    bwsel  : 4,
+    crystal_ref: true
+};
+
 #[no_mangle]
 pub extern fn main() -> i32 {
     extern {
diff --git a/artiq/gateware/drtio/siphaser.py b/artiq/gateware/drtio/siphaser.py
index 9dbee2d11..5237b7453 100644
--- a/artiq/gateware/drtio/siphaser.py
+++ b/artiq/gateware/drtio/siphaser.py
@@ -44,7 +44,7 @@ class SiPhaser7Series(Module, AutoCSR):
             mmcm_freerun_output = mmcm_freerun_output_raw
 
         # 100MHz/125MHz/150MHz to 100MHz/125MHz/150MHz with controllable phase shift,
-        # VCO @ 1000MHz/1200MHz.
+        # VCO @ 800MHz/1000MHz/1200MHz.
         # Inserted between CDR and output to Si, used to correct
         # non-determinstic skew of Si5324.
         mmcm_ps_fb = Signal()