From f07c7e9c6f84eb8693f692b1ac554bbb5b80b0dc Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Thu, 27 Aug 2015 10:47:44 +0800
Subject: [PATCH] runtime/dds: fix AD9914 register initialization values

Thanks Raghavendra Srinivas for the help. Closes #114.
---
 soc/runtime/dds.c       | 4 +++-
 soc/runtime/dds.h       | 1 +
 soc/runtime/test_mode.c | 2 ++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/soc/runtime/dds.c b/soc/runtime/dds.c
index 61a22d4d5..d8b57953c 100644
--- a/soc/runtime/dds.c
+++ b/soc/runtime/dds.c
@@ -18,7 +18,7 @@
 /* DAC calibration takes max. 135us as per datasheet. Take a good margin. */
 #define DURATION_DAC_CAL (30000 << RTIO_FINE_TS_WIDTH)
 /* not counting final FUD */
-#define DURATION_INIT (8*DURATION_WRITE + DURATION_DAC_CAL)
+#define DURATION_INIT (10*DURATION_WRITE + DURATION_DAC_CAL)
 #define DURATION_PROGRAM (5*DURATION_WRITE) /* not counting FUD */
 
 #else
@@ -79,6 +79,8 @@ void dds_init(long long int timestamp, int channel)
 #ifdef DDS_AD9914
     DDS_WRITE(DDS_CFR1H, 0x0000); /* Enable cosine output */
     DDS_WRITE(DDS_CFR2L, 0x8900); /* Enable matched latency */
+    DDS_WRITE(DDS_CFR2H, 0x0080); /* Enable profile mode */
+    DDS_WRITE(DDS_ASF, 0x0fff); /* Set amplitude to maximum */
     DDS_WRITE(DDS_CFR4H, 0x0105); /* Enable DAC calibration */
     DDS_WRITE(DDS_FUD, 0);
     now += DURATION_DAC_CAL;
diff --git a/soc/runtime/dds.h b/soc/runtime/dds.h
index 6ca9d1c1e..03c2bf095 100644
--- a/soc/runtime/dds.h
+++ b/soc/runtime/dds.h
@@ -35,6 +35,7 @@
 #define DDS_FTWL   0x2d
 #define DDS_FTWH   0x2f
 #define DDS_POW    0x31
+#define DDS_ASF    0x33
 #define DDS_FUD    0x80
 #define DDS_GPIO   0x81
 #endif
diff --git a/soc/runtime/test_mode.c b/soc/runtime/test_mode.c
index a15950bee..f402dcfcf 100644
--- a/soc/runtime/test_mode.c
+++ b/soc/runtime/test_mode.c
@@ -239,6 +239,8 @@ static void ddsinit(void)
     brg_ddsreset();
     brg_ddswrite(DDS_CFR1H, 0x0000); /* Enable cosine output */
     brg_ddswrite(DDS_CFR2L, 0x8900); /* Enable matched latency */
+    brg_ddswrite(DDS_CFR2H, 0x0080); /* Enable profile mode */
+    brg_ddswrite(DDS_ASF, 0x0fff); /* Set amplitude to maximum */
     brg_ddswrite(DDS_CFR4H, 0x0105); /* Enable DAC calibration */
     brg_ddswrite(DDS_FUD, 0);
     t = clock_get_ms();