Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""

This reverts commit 7b81ed1d18.
This commit is contained in:
whitequark 2016-11-08 14:22:47 +00:00
parent 7b81ed1d18
commit ec8fe6f8bd
3 changed files with 19 additions and 26 deletions

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@ -86,14 +86,11 @@ class Target:
llmachine = lltarget.create_target_machine( llmachine = lltarget.create_target_machine(
features=",".join(["+{}".format(f) for f in self.features]), features=",".join(["+{}".format(f) for f in self.features]),
reloc="pic", codemodel="default") reloc="pic", codemodel="default")
llmachine.set_verbose(True) llmachine.set_asm_verbosity(True)
return llmachine return llmachine
def optimize(self, llmodule): def optimize(self, llmodule):
llmachine = self.target_machine()
llpassmgr = llvm.create_module_pass_manager() llpassmgr = llvm.create_module_pass_manager()
llmachine.target_data.add_pass(llpassmgr)
llmachine.add_analysis_passes(llpassmgr)
# Register our alias analysis passes. # Register our alias analysis passes.
llpassmgr.add_basic_alias_analysis_pass() llpassmgr.add_basic_alias_analysis_pass()

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@ -37,9 +37,16 @@ def memoize(generator):
class DebugInfoEmitter: class DebugInfoEmitter:
def __init__(self, llmodule): def __init__(self, llmodule):
self.llmodule = llmodule self.llmodule = llmodule
self.llsubprograms = [] self.llcompileunit = None
self.cache = {} self.cache = {}
llident = self.llmodule.add_named_metadata('llvm.ident')
llident.add(self.emit_metadata(["ARTIQ"]))
llflags = self.llmodule.add_named_metadata('llvm.module.flags')
llflags.add(self.emit_metadata([2, "Debug Info Version", 3]))
llflags.add(self.emit_metadata([2, "Dwarf Version", 4]))
def emit_metadata(self, operands): def emit_metadata(self, operands):
def map_operand(operand): def map_operand(operand):
if operand is None: if operand is None:
@ -67,14 +74,13 @@ class DebugInfoEmitter:
}) })
@memoize @memoize
def emit_compile_unit(self, source_buffer, llsubprograms): def emit_compile_unit(self, source_buffer):
return self.emit_debug_info("DICompileUnit", { return self.emit_debug_info("DICompileUnit", {
"language": ll.DIToken("DW_LANG_Python"), "language": ll.DIToken("DW_LANG_Python"),
"file": self.emit_file(source_buffer), "file": self.emit_file(source_buffer),
"producer": "ARTIQ", "producer": "ARTIQ",
"runtimeVersion": 0, "runtimeVersion": 0,
"emissionKind": 2, # full=1, lines only=2 "emissionKind": 2, # full=1, lines only=2
"subprograms": self.emit_metadata(llsubprograms)
}, is_distinct=True) }, is_distinct=True)
@memoize @memoize
@ -86,21 +92,26 @@ class DebugInfoEmitter:
@memoize @memoize
def emit_subprogram(self, func, llfunc): def emit_subprogram(self, func, llfunc):
source_buffer = func.loc.source_buffer source_buffer = func.loc.source_buffer
if self.llcompileunit is None:
self.llcompileunit = self.emit_compile_unit(source_buffer)
llcompileunits = self.llmodule.add_named_metadata('llvm.dbg.cu')
llcompileunits.add(self.llcompileunit)
display_name = "{}{}".format(func.name, types.TypePrinter().name(func.type)) display_name = "{}{}".format(func.name, types.TypePrinter().name(func.type))
llsubprogram = self.emit_debug_info("DISubprogram", { return self.emit_debug_info("DISubprogram", {
"name": func.name, "name": func.name,
"linkageName": llfunc.name, "linkageName": llfunc.name,
"type": self.emit_subroutine_type(func.type), "type": self.emit_subroutine_type(func.type),
"file": self.emit_file(source_buffer), "file": self.emit_file(source_buffer),
"line": func.loc.line(), "line": func.loc.line(),
"unit": self.llcompileunit,
"scope": self.emit_file(source_buffer), "scope": self.emit_file(source_buffer),
"scopeLine": func.loc.line(), "scopeLine": func.loc.line(),
"isLocal": func.is_internal, "isLocal": func.is_internal,
"isDefinition": True, "isDefinition": True,
"variables": self.emit_metadata([]) "variables": self.emit_metadata([])
}, is_distinct=True) }, is_distinct=True)
self.llsubprograms.append(llsubprogram)
return llsubprogram
@memoize @memoize
def emit_loc(self, loc, scope): def emit_loc(self, loc, scope):
@ -110,18 +121,6 @@ class DebugInfoEmitter:
"scope": scope "scope": scope
}) })
def finalize(self, source_buffer):
llident = self.llmodule.add_named_metadata('llvm.ident')
llident.add(self.emit_metadata(["ARTIQ"]))
llflags = self.llmodule.add_named_metadata('llvm.module.flags')
llflags.add(self.emit_metadata([2, "Debug Info Version", 3]))
llflags.add(self.emit_metadata([2, "Dwarf Version", 4]))
llcompile_units = self.llmodule.add_named_metadata('llvm.dbg.cu')
llcompile_units.add(self.emit_compile_unit(source_buffer, tuple(self.llsubprograms)))
class LLVMIRGenerator: class LLVMIRGenerator:
def __init__(self, engine, module_name, target, embedding_map): def __init__(self, engine, module_name, target, embedding_map):
self.engine = engine self.engine = engine
@ -410,9 +409,6 @@ class LLVMIRGenerator:
for func in functions: for func in functions:
self.process_function(func) self.process_function(func)
if any(functions):
self.debug_info_emitter.finalize(functions[0].loc.source_buffer)
if attribute_writeback and self.embedding_map is not None: if attribute_writeback and self.embedding_map is not None:
self.emit_attribute_writeback() self.emit_attribute_writeback()

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@ -18,7 +18,7 @@ requirements:
- binutils-or1k-linux - binutils-or1k-linux
run: run:
- python >=3.5.2 - python >=3.5.2
- llvmlite-artiq 0.10.0.dev py35_24 - llvmlite-artiq 0.11.0.dev py35_25
- lit - lit
- outputcheck - outputcheck
- scipy - scipy