mirror of https://github.com/m-labs/artiq.git
kasli: remove VLBAIMaster, VLBAISatellite variants
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0c9b810501
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@ -662,69 +662,8 @@ class Satellite(SatelliteBase):
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self.add_rtio(self.rtio_channels)
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class VLBAIMaster(MasterBase):
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def __init__(self, hw_rev=None, *args, **kwargs):
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if hw_rev is None:
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hw_rev = "v1.1"
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MasterBase.__init__(self, rtio_clk_freq=125e6, hw_rev=hw_rev, *args,
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**kwargs)
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self.rtio_channels = []
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eem.DIO.add_std(self, 0,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 1,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 2,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Sampler.add_std(self, 3, None, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 5, 4, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 6, None, ttl_serdes_7series.Output_8X)
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for i in (0, 1):
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phy = ttl_simple.Output(self.platform.request("user_led", i))
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self.submodules += phy
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self.rtio_channels.append(rtio.Channel.from_phy(phy))
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eem.Zotino.add_std(self, 7, ttl_serdes_7series.Output_8X)
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self.config["HAS_RTIO_LOG"] = None
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self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
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self.rtio_channels.append(rtio.LogChannel())
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self.add_rtio(self.rtio_channels)
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class VLBAISatellite(SatelliteBase):
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def __init__(self, hw_rev=None, *args, **kwargs):
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if hw_rev is None:
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hw_rev = "v1.1"
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SatelliteBase.__init__(self, rtio_clk_freq=125e6, hw_rev=hw_rev,
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*args, **kwargs)
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self.rtio_channels = []
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eem.DIO.add_std(self, 0,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 1,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 2,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Sampler.add_std(self, 3, None, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 5, 4, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 6, None, ttl_serdes_7series.Output_8X)
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for i in (0, 1):
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phy = ttl_simple.Output(self.platform.request("user_led", i))
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self.submodules += phy
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self.rtio_channels.append(rtio.Channel.from_phy(phy))
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eem.Zotino.add_std(self, 7, ttl_serdes_7series.Output_8X)
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self.add_rtio(self.rtio_channels)
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VARIANTS = {cls.__name__.lower(): cls for cls in [
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Opticlock, SUServo,
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VLBAIMaster, VLBAISatellite,
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Tester, Master, Satellite]}
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