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https://github.com/m-labs/artiq.git
synced 2024-12-25 11:18:27 +08:00
runtime: match argument signedness between ARTIQ Python and ksupport.
This is only required when reading the ABI very strictly, but better be conservative here than spend time debugging silly stuff.
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cf12a888e7
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@ -75,7 +75,9 @@ mod imp {
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use self::imp::*;
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pub extern fn init(busno: u32) {
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pub extern fn init(busno: i32) {
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let busno = busno as u32;
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// Set SCL as output, and high level
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scl_o(busno, true);
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scl_oe(busno, true);
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@ -92,7 +94,9 @@ pub extern fn init(busno: u32) {
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}
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}
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pub extern fn start(busno: u32) {
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pub extern fn start(busno: i32) {
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let busno = busno as u32;
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// Set SCL high then SDA low
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scl_o(busno, true);
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half_period();
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@ -100,7 +104,9 @@ pub extern fn start(busno: u32) {
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half_period();
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}
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pub extern fn stop(busno: u32) {
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pub extern fn stop(busno: i32) {
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let busno = busno as u32;
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// First, make sure SCL is low, so that the target releases the SDA line
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scl_o(busno, false);
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half_period();
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@ -112,7 +118,9 @@ pub extern fn stop(busno: u32) {
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half_period();
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}
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pub extern fn write(busno: u32, data: u8) -> bool {
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pub extern fn write(busno: i32, data: i8) -> bool {
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let (busno, data) = (busno as u32, data as u8);
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// MSB first
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for bit in (0..8).rev() {
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// Set SCL low and set our bit on SDA
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@ -135,7 +143,9 @@ pub extern fn write(busno: u32, data: u8) -> bool {
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!sda_i(busno)
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}
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pub extern fn read(busno: u32, ack: bool) -> u8 {
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pub extern fn read(busno: i32, ack: bool) -> i8 {
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let busno = busno as u32;
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// Set SCL low first, otherwise setting SDA as input may cause a transition
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// on SDA with SCL high which will be interpreted as START/STOP condition.
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scl_o(busno, false);
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@ -162,5 +172,5 @@ pub extern fn read(busno: u32, ack: bool) -> u8 {
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scl_o(busno, true);
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half_period();
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data
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data as i8
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}
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@ -224,26 +224,26 @@ pub extern fn __artiq_terminate(exception: *const kernel_proto::Exception,
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loop {}
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}
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extern fn watchdog_set(ms: i64) -> usize {
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extern fn watchdog_set(ms: i64) -> i32 {
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if ms < 0 {
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artiq_raise!("ValueError", "cannot set a watchdog with a negative timeout")
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}
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send(&WatchdogSetRequest { ms: ms as u64 });
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recv!(&WatchdogSetReply { id } => id)
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recv!(&WatchdogSetReply { id } => id) as i32
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}
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extern fn watchdog_clear(id: usize) {
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send(&WatchdogClear { id: id })
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extern fn watchdog_clear(id: i32) {
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send(&WatchdogClear { id: id as usize })
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}
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extern fn cache_get(key: *const u8) -> (usize, *const i32) {
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extern fn cache_get(key: *const u8) -> ArtiqList<i32> {
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extern { fn strlen(s: *const c_char) -> size_t; }
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let key = unsafe { slice::from_raw_parts(key, strlen(key as *const c_char)) };
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let key = unsafe { str::from_utf8_unchecked(key) };
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send(&CacheGetRequest { key: key });
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recv!(&CacheGetReply { value } => (value.len(), value.as_ptr()))
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recv!(&CacheGetReply { value } => ArtiqList::from_slice(value))
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}
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extern fn cache_put(key: *const u8, list: ArtiqList<i32>) {
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@ -39,7 +39,7 @@ pub unsafe fn rtio_i_data_read(offset: usize) -> u32 {
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}
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#[inline(never)]
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unsafe fn process_exceptional_status(timestamp: i64, channel: u32, status: u32) {
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unsafe fn process_exceptional_status(timestamp: i64, channel: i32, status: u32) {
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if status & RTIO_O_STATUS_FULL != 0 {
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while csr::rtio::o_status_read() & RTIO_O_STATUS_FULL != 0 {}
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}
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@ -69,12 +69,12 @@ unsafe fn process_exceptional_status(timestamp: i64, channel: u32, status: u32)
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}
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}
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pub extern fn output(timestamp: i64, channel: u32, addr: u32, data: u32) {
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pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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csr::rtio::o_timestamp_write(timestamp as u64);
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csr::rtio::o_address_write(addr);
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rtio_o_data_write(0, data);
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csr::rtio::o_address_write(addr as u32);
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rtio_o_data_write(0, data as u32);
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csr::rtio::o_we_write(1);
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let status = csr::rtio::o_status_read();
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if status != 0 {
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@ -83,11 +83,11 @@ pub extern fn output(timestamp: i64, channel: u32, addr: u32, data: u32) {
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}
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}
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pub extern fn output_wide(timestamp: i64, channel: u32, addr: u32, list: ArtiqList<i32>) {
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pub extern fn output_wide(timestamp: i64, channel: i32, addr: i32, list: ArtiqList<i32>) {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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csr::rtio::o_timestamp_write(timestamp as u64);
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csr::rtio::o_address_write(addr);
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csr::rtio::o_address_write(addr as u32);
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let data = list.as_slice();
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for i in 0..data.len() {
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rtio_o_data_write(i, data[i] as u32)
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@ -100,9 +100,9 @@ pub extern fn output_wide(timestamp: i64, channel: u32, addr: u32, list: ArtiqLi
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}
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}
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pub extern fn input_timestamp(timeout: i64, channel: u32) -> u64 {
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pub extern fn input_timestamp(timeout: i64, channel: i32) -> u64 {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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let mut status;
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loop {
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status = csr::rtio::i_status_read();
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@ -136,9 +136,9 @@ pub extern fn input_timestamp(timeout: i64, channel: u32) -> u64 {
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}
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}
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pub extern fn input_data(channel: u32) -> u32 {
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pub extern fn input_data(channel: i32) -> i32 {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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loop {
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let status = csr::rtio::i_status_read();
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if status == 0 { break }
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@ -153,7 +153,7 @@ pub extern fn input_data(channel: u32) -> u32 {
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let data = rtio_i_data_read(0);
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csr::rtio::i_re_write(1);
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data
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data as i32
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}
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}
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