diff --git a/artiq/examples/phaser/repository/dac_setup.py b/artiq/examples/phaser/repository/dac_setup.py
index ba3376184..ed6c0158d 100644
--- a/artiq/examples/phaser/repository/dac_setup.py
+++ b/artiq/examples/phaser/repository/dac_setup.py
@@ -18,7 +18,7 @@ ts = JESD204BTransportSettings(
     cs=1,           #
 )
 jesd_settings = JESD204BSettings(ps, ts, did=0x5a, bid=0x5)
-jesd_checksum = jesd_settings.get_configuration_data()[-1]
+jesd_checksum = jesd_settings.get_configuration_checksum()
 # external clk=2000MHz
 # pclock=250MHz
 # deviceclock_fpga=500MHz