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artiq
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DMA: speed up playback 

Time reduced from 1.53µs to 1.37µs.
pull/231/merge
Sebastien Bourdeauducq 2017-04-19 10:59:12 +08:00
parent 41c4de4556
commit e8f7f8ef9c
2 changed files with 16 additions and 14 deletions
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28
artiq/firmware/ksupport/lib.rs
View File

@ -398,19 +398,21 @@ extern fn dma_playback(timestamp: i64, ptr: i32) {
csr::cri_con::selected_write(0);
let status = csr::rtio_dma::error_status_read();
let timestamp = csr::rtio_dma::error_timestamp_read();
let channel = csr::rtio_dma::error_channel_read();
if status & rtio::RTIO_O_STATUS_UNDERFLOW != 0 {
csr::rtio_dma::error_underflow_reset_write(1);
raise!("RTIOUnderflow",
"RTIO underflow at {0} mu, channel {1}",
timestamp as i64, channel as i64, 0)
}
if status & rtio::RTIO_O_STATUS_SEQUENCE_ERROR != 0 {
csr::rtio_dma::error_sequence_error_reset_write(1);
raise!("RTIOSequenceError",
"RTIO sequence error at {0} mu, channel {1}",
timestamp as i64, channel as i64, 0)
if status != 0 {
let timestamp = csr::rtio_dma::error_timestamp_read();
let channel = csr::rtio_dma::error_channel_read();
if status & rtio::RTIO_O_STATUS_UNDERFLOW != 0 {
csr::rtio_dma::error_underflow_reset_write(1);
raise!("RTIOUnderflow",
"RTIO underflow at {0} mu, channel {1}",
timestamp as i64, channel as i64, 0)
}
if status & rtio::RTIO_O_STATUS_SEQUENCE_ERROR != 0 {
csr::rtio_dma::error_sequence_error_reset_write(1);
raise!("RTIOSequenceError",
"RTIO sequence error at {0} mu, channel {1}",
timestamp as i64, channel as i64, 0)
}
}
}
}

2
artiq/test/coredevice/test_rtio.py
View File

@ -605,7 +605,7 @@ class DMATest(ExperimentCase):
exp.playback_many(count)
dt = self.dataset_mgr.get("dma_playback_time")
print("dt={}, dt/count={}".format(dt, dt/count))
self.assertLess(dt/count, 7*us)
self.assertLess(dt/count, 3*us)
def test_handle_invalidation(self):
exp = self.create(_DMA)